Hafnium-nitride gate insulator formed by electron-cyclotron-resonance plasma sputtering

IEICE Electron. Express

2016

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In this paper, we have investigated bilayer HfN x gate insulator utilizing ECR plasma sputtering especially for the electrical properties with metallic-phase HfN 0.5 gate electrode which was formed by in-situ process. After PMA of 500°C/10 min in N 2 /4.9%H 2 ambient, the bilayer of HfN 1.3 (1.7 nm)/HfN 1.1 (0.9 nm) gate insulator formed on Si(100) showed the EOT of 0.61 nm, leakage current density (@V FB −1 V) of 5.5 × 10 −3 A/cm 2 and density of interface states (D it) of 5.5 × 10 11 cm −2 eV −1. The n-MISFET with bilayer HfN x gate insulator exhibited saturation mobility (μ sat) of 47 cm 2 /(V s), which higher than the device with directly deposited HfN 1.3 gate insulator. HfN x interfacial layer (IL) with low nitrogen concentration was found to significantly improve the interface properties of HfN x gate stacks.

Section: Introductionmentioning

confidence: 99%

Investigation of bilayer HfN<sub>x</sub> gate insulator utilizing ECR plasma sputtering

Atthi

IEICE Electron. Express

2016

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“…In order to realize the adequate device scaling, various new materials have been introduced in the MOSFETs [1][2][3][4][5][6] especially for the gate stack structures [7][8][9][10][11]. With the device scaling, ultrathin gate insulator is necessary to be introduced.…”

Section: Introductionmentioning

confidence: 99%

Variability Improvement by Si Surface Flattening of Electrical Characteristics in MOSFETs With High-k HfON Gate Insulator

IEEE Trans. Semicond. Manufact.

Kudoh

Atthi

2015

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Variability improvement of metal-oxidesemiconductor field-effect transistors (MOSFETs) characteristics with high-k HfON gate insulator by Si surface flattening was investigated. The Si surface flattening process was carried out by Ar/4.9%H2 anneal utilizing rapid thermal annealing (RTA) system. The HfON gate insulator was formed by the in-situ Ar/O2 plasma oxidation of HfN utilizing electron cyclotron resonance (ECR) plasma sputtering followed by the post deposition anneal (PDA) at 600 o C for 1 min. The Si surface flattening was found to significantly improve the threshold voltage variability (VTH) of MOSFET with HfON gate insulator for the first time. Furthermore, the stability of the device characteristics was improved up to the measurement temperature of 100 o C by introducing the Si surface flattening process. Index Terms-ECR plasma sputtering, gate insulator, HfON, high-k, MOSFETs, Si surface flattening, variability 0894-6507 (c)

“…Therefore, high dielectric materials which enable further reduction of EOT should be introduced as a gate insulator. Among the high-k materials, Hf-based high-k dielectrics especially for Hf-based oxide and/or nitride films are being extensively investigated as one of the most promising candidate materials [12,13,14,15].…”

Section: Introductionmentioning

confidence: 99%

“…So far, we have studied the effect of silicon surface roughness on MOSFET performance with ultrathin HfON gate insulator formed by ECR sputtering [16]. In this paper, we investigated the impact of Si surface roughness on nMOSFET characteristics with HfON gate insulator formed by ECR plasma sputtering.…”

Section: Introductionmentioning

confidence: 99%

Impact of Si surface roughness on MOSFET characteristics with ultrathin HfON gate insulator formed by ECR plasma sputtering

Han

IEICE Electron. Express

2013

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In this paper, the impact of Si surface roughness on metal oxide semiconductor field effect transistor (MOSFET) characteristics with ultrathin hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) sputtering was investigated. The surface roughness of Si substrate was reduced by Ar/4.9%H 2 annealing utilizing conventional rapid thermal annealing (RTA) system. The obtained root-mean-square (RMS) roughness was 0.08 nm (as-cleaned: 0.21 nm). The HfON was formed by 2 nm-thick HfN deposition followed by the Ar/O 2 plasma oxidation. The electrical properties of HfON gate insulator were improved by the reduction of Si surface roughness. It was found that the current drivability of fabricated nMOSFETs was remarkably increased by reduction of Si surface roughness.