Growth of low temperature silicon nano-structures for electronic and electrical energy generation applications

Abstract

This paper represents the lowest growth temperature for silicon nano-wires (SiNWs) via a vapour-liquid–solid method, which has ever been reported in the literature. The nano-wires were grown using plasma-enhanced chemical vapour deposition technique at temperatures as low as 150°C using gallium as the catalyst. This study investigates the structure and the size of the grown silicon nano-structure as functions of growth temperature and catalyst layer thickness. Moreover, the choice of the growth temperature determines the thickness of the catalyst layer to be used.The electrical and optical characteristics of the nano-wires were tested by incorporating them in photovoltaic solar cells, two terminal bistable memory devices and Schottky diode. With further optimisation of the growth parameters, SiNWs, grown by our method, have promising future for incorporation into high performance electronic and optical devices.

Birth of silicon nanowires covered with protective insulating blanket

“…Nevertheless, until now, these methods are used either to produce SiNWs, SiO x NWs or silica NWs. [3,[11][12][13] This work demonstrates the growth of Si-SiO x NWs simultaneously without additional process steps in large quantities, which are uniform, well defined, and better aligned. This process does not pose problems associated with non-conformal coating due to the shadowing of NWs and allows the optimization and controlled growth with a mature and already available PECVD technique at low temperatures (300°C).…”

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

“…SiNWs for the 2TNV memories as well as the MIS devices were deposited using previously published method from our research group13; Ga catalyst layer was deposited before PECVD process; temperature of 400 °C, a pressure of 200 mTorr, RF power of 25 Watts and growth time of 30 minutes. SiH 4 and H 2 flow rates were set to 20 and 100 sccm respectively.…”

Comparative Study of Silicon Nanowires Grown From Ga, In, Sn, and Bi for Energy Harvesting

“…8c) are observed only for Ga catalysed SiNWs. This may be attributed to the local supersaturation of the catalyst drops that wetted the nanowires, as the liquid catalyst flows along vertical down to the NW [9], [11]. This can be thought of as molten wax that flows along the vertical down to a burning candle.…”

“…Solar cells fabricated from SiNWs made using the Ga and In catalysts have almost similar IV characteristics with low Isc and Voc compared to other two devices. A few publications [9], [32], report on wetting of SiNWs by these catalysts on the sidewalls of the nanowires, which is a possible recombination site for photo-generated charge carriers. This increases the dark saturation current that in turn decreases the open circuit potential.…”

“…This can be achieved by several strategies including the heterojunction discussed in this paper. The use of SiNWs for solar cells shows several advantages including, enhanced absorption by trapping and scattering light, reduced reflection <5% compared to 40% in planar Si devices, collection of photo-generated carriers in different directions, efficient separation of charges due to large surface area, decoupling light absorption and charge transfer as light can be absorbed axially and carriers travel axially and radially to electrodes and these are, all achieved using less silicon compared to planar C-Si solar cells [2], [8], [9], [10], [11], [12], [13]. This research focuses on solar cells in which the junction is established by a crystalline wafer and crystalline nanowire (we term this as a wafer-wire junction).…”