Growth of InGaN HBTs by MOCVD

Abstract

The design and growth of GaN/InGaN heterojunction bipolar transistors (HBTs) by metalorganic chemical vapor deposition (MOCVD) are studied. Atomic-force microscopy (AFM) images of p 1 InGaN base layers (;100 nm) deposited under various growth conditions indicate that the optimal growth temperature is limited to the range between 810 and 830°C due to a trade-off between surface roughness and indium incorporation. At these temperatures, the growth pressure must be kept above 300 Torr in order to keep surface pit density under control. An InGaN graded-composition emitter is adopted in order to reduce the number of V-shaped defects, which appear at the interface between GaN emitter and InGaN base and render an abrupt emitter-base heterojunction nearly impossible. However, the device performance is severely limited by the high p-type base contact resistance due to surface etching damage, which resulted from the emitter mesa etch.

Wafer-level MOCVD growth of AlGaN/GaN-on-Si HEMT structures with ultra-high room temperature 2DEG mobility

“…[1][2][3][4][5][6][7][8][9][10][11] One of the most important applications is in the fabrication of AlGaN/GaN high electron mobility transistor (HEMT) which utilizes a two-dimensional electron gas (2DEG) layer formed at the interface of GaN and AlGaN. The properties of HEMTs are dependent on the electron mobility and the sheet carrier density of the 2DEG layer.…”

High‐performance GaN/InGaN double heterojunction bipolar transistors with power density >240 kW/cm2

“…The detailed growth techniques were described in [21]. The device fabrication process starts with the Cl 2 -based mesa etching using a STS™ inductively coupled plasma (ICP) etching system.…”

Surface Leakage in GaN/InGaN Double Heterojunction Bipolar Transistors

“…The detailed material growth optimization was reported earlier, and high-quality GaN/InGaN DHBT structures were achieved with reduced bulk-defect and "V"-defect densities on sapphire substrates [13], [14]. The epitaxial layers consist of a 2500-nm unintentionally doped GaN buffer layer, a 1000-nm GaN subcollector layer (Si-doped, free electron concentration (n) = 3.7 × 10 18 cm −3 ), a 500-nm n-GaN collector layer (Si-doped, n = 1.0 × 10 17 cm −3 ), a 30-nm In x Ga 1−x N (x = 0−0.03) collector grading layer, a 100-nm Mg-doped In 0.03 Ga 0.97 N base layer (Mg-doped, freehole concentration (p)=2×10 18 cm −3 , R s = 27.2 kΩ/square), a 30-nm In x Ga 1−x N (x = 0.03 − 0) emitter-grading layer, and a 70-nm n-GaN emitter cap layer (n ∼ 1 × 10 19 cm −3 ).…”