Graphene Versus Ohmic Metal as Source‐Drain Electrode for MoS₂ Nanosheet Transistor Channel

Abstract

sputter-deposition and photolithography. As a result, we found a unique property of graphene electrode, which not only showed superior ohmic or ON current behavior to those of Au/Ti but also more enhanced OFF state behavior as well. We regard that such positive results are attributed to gate-voltage-induced work function tuning in exfoliated graphene.A scanning electron microscopy (SEM) image in Figure 1 a shows 30-µm-long MoS 2 fl ake that we placed on 285-nm-thick SiO 2 /p + -Si substrate, where two Au/Ti electrodes are deposited on MoS 2 while two graphene fl akes are placed on the same MoS 2 . The graphene electrodes are then connected to Au/Ti lead lines, as shown in the overall device scheme of Figure 1 b. Figure 1 c illustrates an initial device process step where the MoS 2 exfoliation by polydimethylsiloxane (PDMS) stamp and its transfer to SiO 2 /p + -Si substrate are performed, while another similar steps for graphene transfer are also shown in Figure 1 d where in fact we use an optical microscope (OM) to fi nd the initially-transferred MoS 2 channel fl ake and to align the graphene S/D fl akes on the MoS 2 channel fl ake (note the four arrows indicating such fl ake alignment by substrate stage movement). Since the contact needs some pressure (to red arrow direction) between graphene and device substrate, we call this contact method "direct imprint" and more details were recently introduced elsewhere. [ 38 ] After the two graphene S/D electrodes were properly arranged, Au/Ti (50 nm/25 nm) contact electrodes were patterned by photolithography and DC sputter-deposition/liff-off processes as respectively shown in Figure 1 e,f, to contact both MoS 2 and graphene electrodes once and for all. Figure 1 f is a schematic version of SEM image in Figure 1 a. Since we initially assumed that our long MoS 2 should have a uniform thickness in every location, it was necessary to experimentally measure the thickness of at least two important locations in Figure 2 a (an OM version of Figure 1 a): a central location (MoS 2 I) between graphene electrodes and another central location (MoS 2 II) between Au/Ti electrodes.According to atomic force microscopy scan results, the thicknesses of those two regions appear almost the same, to be ≈5 nm (7≈8 L) (see Figure 2 b,c). We also measured the thicknesses of two graphene S/D fl akes, which appear 15 and 12 nm for Gr1 and Gr2, respectively (see Figure 2 d,e). Figure 3 a displays the drain current-gate voltage ( I D -V G ) transfer characteristics obtained from both MoS 2 nanosheet FETs with graphene and Au/Ti S/D contacts, which have not Field-Effect TransistorsMechanically-exfoliated or chemical vapor deposited graphene has been extensively studied for any practical usages as the most well-known two dimensional (2D) nanosheet, since it was found and developed. [1][2][3][4][5][6] One of the practical applications was a source/drain (S/D) electrode [7][8][9][10][11][12][13][14][15] for such a variety of transistors as organic thin-fi lm transistors, [ 11 ] Si-based transistors, [ ...

Non‐Lithographic Fabrication of All‐2D α‐MoTe2 Dual Gate Transistors

“…[ 5,6 ] All the processes to fabricate the FETs are introduced step by step as seen in Figure S1 in the Supporting Information, and the main fabrication method was mechanical exfoliation and subsequent direct imprinting. [ 23,24 ] Raman spectroscopy probing ( λ = 532 nm) on the center (indicated by a red spot in Figure 2 a) of our dual gate FET all at once provides us with the information about the identities of all 2D fl akes used for FET fabrication: α-MoTe 2 [ 25,26 ] channel, graphene [ 27 ] electrode, and h-BN [28][29][30] gate dielectrics. More precise Raman data of α-MoTe 2 (for A 1g , E 1 2g , and B 1 2g peaks) and h-BN (E 2g peak) layers were obtained respectively in Figure 2 c and d by selectively magnifying the Raman data of Figure 2 b, where G and 2D peaks for graphene layers were mainly observed (here, G peak is more intense than 2D peak and D peak is not clearly observed, which might be as an evidence that our single crystalline graphene is quite thick.…”

Contact research strategy for emerging molybdenum disulfide and other two-dimensional field-effect transistors

“…The second approach to improve the contact is to combine graphene and MoS 2 so as to create heterostructures which becomes an inspiring process to highlight the positive properties of each individual material. [65][66][67][68][69][70][71][72][73][74][75] N-type few-layer MoS 2 field-effect transistors with graphene/Ti as the hetero-contacts had been fabricated recently, where the chemical vapor deposition (CVD) grown monolayer graphene had been successfully transferred to the exfoliated MoS 2 contact area, and the contact resistance of hetero-contacts has been significantly reduced compared to metal-direct contact. 76,77 A maximum of 161.2 mA/mm drain current at 1 μm gate length with an on-off current ratio of 10 7 had been achieved in few-layer MoS 2 field-effect transistors with graphene/Ti hetero-contacts.…”

High performance MoS2 TFT using graphene contact first process

“…3(b), the drain current changes with different gate bias, it is because that Fermi level of graphene will shift when applying different gate bias, result in p-type, intrinsic, and n-type characteristic. 10 Different from Cr/Au electrodes, the work function of graphene can be modulated. As a result, the subthreshold swing can be improved.…”

“…Recently, comparison between graphene and metal contact for the source/drain (S/D) electrode of MoS 2 has been carried out. [10][11][12] However, the in-depth study on the band diagram of MoS 2 /graphene has rarely been reported yet. And more importantly, the mobility of MoS 2 TFTs using graphene contact showed just little difference from that using metal contact.…”

“…And more importantly, the mobility of MoS 2 TFTs using graphene contact showed just little difference from that using metal contact. [10][11][12] In order to further improve the performance of MoS 2 TFTs, two major problems, high processes temperature and PMMA residue, should be solved. At high processing temperature MoS 2 will oxidize and decompose into MoO 3 and SO 2 , this may degrade the performance of MoS 2 TFTs.…”