Goldilocks failures: Not too soft, not too hard

Abstract

It is well known that circuits fail when one or more of the constituent components fails, due -for example-to phenomena such as electromigration in wires. Such hard failures, typically due to topological changes in circuit connectivity, are treated distinctly from soft failures which could be due to components drifting out of spec over time. However, in certain types of circuits, such as memory, the distinction between soft and hard failures is not clearly defined. The primary cause of the blurring between these two phenomena is manufacturing variability, which can make a topologically correct circuit behave as if it had a short or an open. This paper will show the linkage between these two failure types, and show how increasing variability in future technologies will likely exacerbate this problem further.

Resilience and yield of flip‐flops in future CMOS technologies under process variations and aging

“…In Section 4 we will use a definition for the total failure rate as the sum of total fails, which do not switch at all either at a rising or at a falling edge, plus the sum of metastabilities with a c2q delay above μ +9σ. This is rather similar to [3] where a failure is assumed for a 10 × enhanced switching time of the latch.…”

“…The influence of the ever increasing process variations in future CMOS technologies on the performance and the yield of digital CMOS circuits have received increasing attention in recent publications [1][2][3]. Whereas the impacts on static random access memory (SRAM) reliability as well as on timing of digital circuits have been studied in broad scope in a large number of papers [4][5][6][7][8].…”

Addressing failures in exascale computing

“…As supply voltage is reduced in order to improve energy efficiency and reduce power consumption, maintaining the integrity of storage elements, including latches, flip-flops, and SRAM cells, is challenging. For example, Vc c min -related errors can induce so-called Goldilocks failures (Nassif et al, 2012): failures that appear hard but are, in fact, caused by phenomena typically associated with soft failures. Such failures are expected to become more problematic with increasingly complex circuits and lower voltage supplies, affecting circuit structures besides SRAM.…”

Realistic 55nm IC failure in time (FIT) estimates from automotive field returns

“…4 and 5.). Further studies were conducted and indicate these "NTFs" could be marginal parts similar to [2]. A model [3] was constructed to illustrate that these soft failures with "no trouble found" had a marginal principal component.…”