Global parameter extraction for a multi-gate MOSFETs compact model

Exploring sub-20nm FinFET design with predictive technology models

“…BSIM-CMG is a surface-potential-based compact model that can model different multi-gate structures (double-gate, tri-gate and gateall-around FETs) [9] [10]. In addition to incorporating the effect of the 3D structure and quantum mechanical effects (QME) on device characteristics and short channel effects, the model retains the standard framework of BSIM4 and BSIM-SOI models for real-device effects such as mobility degradation, velocity saturation, series resistance, parasitic capacitance, etc., allowing ease in efficient extraction of model parameters.…”

Spice modeling of oxide and interface trapped charge effects in fully-depleted double-gate FinFETs

“…Consequently, the accurate capturing of the dynamic contribution of the both N ox and D it trapped charge by the FinFET electrical models in Spice is important for lifetime prediction and verification of long-term performance of advanced CMOS ICs. In recently adopted industry-standard Spice model BSIM.CMG [11] of multi-gate FinFETs, however, there is no a userdefined input for N ox , while the effect of D it is included only trough the interface state capacitance C it taken as fitting parameter in sub-threshold region [12]. With neglecting the bias-dependence of D it and omitting to include N ox as parameter, the BSIM.CMG model appears unsuitable for predicting the aging effects in circuit simulations.…”

“…The complementary p-type DG FinFET with the same geometry and identical but opposite type doping areas is also employed for simulations of aging effects in CMOS circuits. A long channel device is used in this study in order to simplify the extraction of BSIM.CMG model parameters [12] performed here based on the results of 2D TCAD device simulations. In addition, the t Si and t ox parameter values are chosen to enable full depletion of doped silicon fin at zero gate voltage and avoid the appearance of quantum confinement effects [13] complicating the model calibration.…”

Remembrance of Transistors Past

“…To be effectively used in circuit design simulations, all the many dozens of model parameters need to be carefully extracted from multiple test structures (e.g., I-V structures, C-V structures, ring oscillators, etc) so that the model can accurately reproduce the transistor electrical characteristics. Usually the set of model parameters is divided into subsets of local and global parameters, where the local parameters apply to a single device dimension while global parameters apply to all relevant device geometries [1]. Therefore experimental data for devices with different geometries and replicas are needed to find the global set of parameters.…”