Glass interposer for advanced packaging solution

Integrated Photonics Packaging: Challenges and Opportunities

“…These vias serve a dual purpose for electrical connections between different layers in the glass interposer enabling highly dense fan-out wafer level or panel level packaging (FOWLP or FOPLP) . Researchers have demonstrated glass interposers with 2/2 μm line width/spacing and 4–8 layered wiring at an assembly pitch of 40 μm and BGA pitch of 800 μm …”

“…At the package level, the drive is to remove thermal isolators, such as a PCB, from the stack and replace them with thermally efficient substrates. Current solutions are highly conductive materials such as silicon, ceramic, and, more recently, glass with copper vias . This has to be combined with research in thermally conductive materials, heat spreaders and heat sinks, to bring the thermal packaging demand in sync with the ever-increasing power density trends.…”

“…115 Researchers have demonstrated glass interposers with 2/2 μm line width/ spacing and 4−8 layered wiring at an assembly pitch of 40 μm and BGA pitch of 800 μm. 116 In general, 2.5D integration requires aggregation of significant resources such as electronic design automation (EDA) tools for co-designing of EIC and PIC with respect to the interposer platform capabilities. On the other hand, it offers the highest design flexibility, ease of thermal management and high-volume scalability.…”

“…Current solutions are highly conductive materials such as silicon, 104 ceramic, 105 and, more recently, glass with copper vias. 116 This has to be combined with research in thermally conductive materials, heat spreaders and heat sinks, to bring the thermal packaging demand in sync with the everincreasing power density trends. Generally, TECs are expensive and power-hungry, which makes passive cooling an attractive solution whenever possible, for example, when precise thermal management of optoelectronic components is not a priority.…”