Generic Analog 8 Bit DAC IP Block in 28nm CMOS for the High Energy Physics Community

Piller, M.; Ballabriga, R.; Bandi, Franco N.; Borghello, Giulio; Ceresa, Davide; Pejasinovic, Risto; Sriskaran, Viros; Michalowska-Forsyth, Alicja Malgorzata; Deutschmann, Bernd

doi:10.1109/austrochip56145.2022.9940783

Search citation statements

Order By: Relevance

Paper Sections

Select...

Other Ip Blocks1

Introduction1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2023

2024

Publication Types

Select...

Article1

Other1

Relationship

Self Cite0

Independent2

Authors

Journals

Cited by 2 publications

(2 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Other IP blocks are also under test and characterization: a 8-bit DAC [2], a bandgap reference and temperature monitor [3]. Also, a rail to rail operational amplifier for buffering has been designed and will be submitted soon.…”

Section: Other Ip Blocksmentioning

confidence: 99%

See 1 more Smart Citation

Analog IP blocks in 28 nm CMOS for the high energy physics community: SLVS transmitter and receiver

et al. 2023

View full text Add to dashboard Cite

A Scalable Low Voltage Signaling (SLVS) transmitter and receiver have been developed as IP blocks in a 28 nm standard CMOS technology for the future upgrades for the high luminosity LHC. At the target data rate of 1.28 Gbps, the transmitter consumes 6 mW and the receiver consumes 2 mW. The transmitter’s output is powered with 1.2 V to provide compatibility with previous designs, while the core logic can be powered with 0.8 V to reduce power consumption. This work summarizes the design approach at the schematic and layout level. Practical aspects of the novel technology for the design of ASICs in High Energy Physics will be discussed along with characterization results. Other IP blocks are being designed (ADC, DAC, PLL) and they will be presented.

show abstract

Section: Other Ip Blocksmentioning

confidence: 99%

“…Furthermore, the other blocks designed in WP5 are listed at the end of this contribution. In the same prototyping chip other IP blocks have been implemented: an 8 bit DAC [2] and a bandgap reference [3].…”

Section: Introductionmentioning

confidence: 99%