Generalized Water-filling for Source-aware Energy-efficient SRAMs

Abstract

Conventional low-power static random access memories (SRAMs) reduce read energy by decreasing the bit-line voltage swings uniformly across the bit-line columns. This is because the read energy is proportional to the bit-line swings. On the other hand, bit-line swings are limited by the need to avoid decision errors especially in the most significant bits. We propose a principled approach to determine optimal non-uniform bit-line swings by formulating convex optimization problems. For a given constraint on mean squared error of retrieved words, we consider criteria to minimize energy (for low-power SRAMs), maximize speed (for high-speed SRAMs), and minimize energy-delay product.These optimization problems can be interpreted as classical water-filling, ground-flattening and waterfilling, and sand-pouring and water-filling, respectively. By leveraging these interpretations, we also propose greedy algorithms to obtain optimized discrete swings. Numerical results show that energyoptimal swing assignment reduces energy consumption by half at a peak signal-to-noise ratio of 30dB for an 8-bit accessed word. The energy savings increase to four times for a 16-bit accessed word. I. INTRODUCTIONVon Neumann computing architectures separate memory units from computing units so there is frequent data access that consumes enormous energy. Since static random access memories (SRAMs) access requires more energy than arithmetic operations [1], SRAM access energy accounts for the significant part of the total energy consumption in many information processing This work was supported in part by Systems on Nanoscale Information fabriCs (SONIC), one of the six SRC STARnet Centers, sponsored by MARCO and DARPA. arXiv:1710.07153v3 [cs.IT] 29 Nov 2017 formulate convex optimization problems whose objectives are as follows: C1. Minimize energy (low-power SRAMs), C2. Maximize speed (high-speed SRAMs), C3. Minimize energy-delay product (EDP).Solutions to these convex problems yield optimal performance that is theoretically attainable.By casting read access for SRAMs as communication over parallel channels, we investigate the fundamental trade-offs between physical resources (energy, delay, and EDP) and a fidelity (MSE) constraint.In addition, we provide generalized water-filling interpretations for our optimal solutions. This follows since accessing a B-bit word is equivalent to communicating information through B parallel channels. In classical water-filling, the ground represents the noise levels of parallel channels [20], [21]. On the other hand, the importance of each bit position determines the ground level in our optimization problems. Each optimization problem has its own interpretation depending on its objective function: water-filling (C1), ground-flattening and water-filling (C2), and sand-pouring and water-filling (C3), respectively. We also observe interesting connections between our problems and variants on water-filling such as constant-power water-filling [22],[23] and mercury/water-filling [24]. Also, we show that the proposed ...

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