2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks 2014
DOI: 10.1109/dsn.2014.96
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GemFI: A Fault Injection Tool for Studying the Behavior of Applications on Unreliable Substrates

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Cited by 59 publications
(35 citation statements)
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“…The authors of [41] proposed a fault injection framework on a microarchitectural simulator to perform dependability analysis. In [30] a fault injection tool based on the cycle accurate full system simulator Gem5 is proposed. Authors of [14] propose a technique to reduce the fault simulation time through grouping error simulations that produce same intermediate execution state.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The authors of [41] proposed a fault injection framework on a microarchitectural simulator to perform dependability analysis. In [30] a fault injection tool based on the cycle accurate full system simulator Gem5 is proposed. Authors of [14] propose a technique to reduce the fault simulation time through grouping error simulations that produce same intermediate execution state.…”
Section: Resultsmentioning
confidence: 99%
“…[42] [23] Arch. injection [9] [41] [30] ACE analysis [26] [27] Probabilistic models [20] In this paper, we propose a comprehensive architecturelevel fault injection framework for early reliability estimation of x86 microprocessors. The proposed framework:…”
Section: Techniquesmentioning
confidence: 99%
“…The kinds of failures that can be injected vary depending on the considered dependability aspect. For example, injecting processor errors or hardware-based errors is often done for evaluating the dependability of operating systems [16], [25]. Injecting connection errors between different micro-services supports to test a service's retry logic and its robustness of interacting with other services [6].…”
Section: A Fault Injectionmentioning
confidence: 99%
“…These methods operate at a low level, and can inject faults into the architectural state, i.e., machine state that are accessible by software, such as memory and registers, or into the microarchitectural state like pipeline logic (such as latches and RAM cells). As examples of architectural-level injectors, Parasyris et al [26] show a framework to inject soft errors using the Gem5 simulator, and Sanda et al [29] describe how soft errors are injected into the IBM Mambo architectural simulator to evaluate the resilience of the POWER6 microprocessor chip. Examples of the microarchitecturallevel injections are shown in [22,38,39].…”
Section: Background and Related Workmentioning
confidence: 99%