Gate Failure Physics of SiC MOSFETs Under Short-Circuit Stress

Liu, Jingcun; Zhang, Guogang; Wang, Bixuan; Li, Wanping; Wang, Jianhua

doi:10.1109/led.2019.2953235

Cited by 70 publications

(39 citation statements)

References 18 publications

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“…In fact, third quadrant operation is considered as the source of new, unknown degradation mechanisms in either SiC or GaN devices. These topics are still investigated by various researchers [20], [28], [29], [30]. However, in the presented example neither of these specific operating conditions shall be dominant.…”

Section: A Case Study: Dfr Procedures For Pebb Modulementioning

confidence: 94%

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WBG-Based PEBB Module for High Reliability Power Converters

2021

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The increasing presence of power electronic converters in the modern world -from electric vehicles, up to industrial applications -brings up concerns about their reliability, especially in the case of the Wide Band-Gap (WBG) devices. Moreover, ensuring high reliability becomes more challenging due to constantly increasing pressure on the development of new types of power supplies in a shorter time. Thus, research over reliability improvement of modern power converters was initiated. In this paper, a concept of Design For Reliability (DfR) procedure, suitable for projects with a short lifespan, and a case study of Power Electronic Building Block (PEBB) designed according to the proposed procedure are presented. Furthermore, a Reliability Oriented Control (ROC) algorithm for WBG-based converters is discussed.

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Section: A Case Study: Dfr Procedures For Pebb Modulementioning

confidence: 94%

“…• gate oxide degradation and time dependent dielectric breakdown (TDDB) [19], [20] - [21], • single event effects (SEE) caused by high energy particles (e.g. neutrons) [22] - [23].…”

Section: A Case Study: Dfr Procedures For Pebb Modulementioning

confidence: 99%

WBG-Based PEBB Module for High Reliability Power Converters

2021

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“…Afterwards, the accumulated energy over 1µs is released during the following microsecond, leading to the solidification of the whole Al layer. Through a thermo-mechanical stress point of view, it is obvious that the estimated temperature of the metal top is above 600K, which leads to the mechanical rupture of the ILD -SiO2 to 1.4GPa, by compression to the Al layer on the top of SiO2 [17]. At cycle #400, as illustrated in Fig.…”

Section: High Vgs Polarization Effectmentioning

confidence: 99%

Repetitive short circuit capability of SiC MOSFET at specific low gate-source voltage bias for more robust extreme operation

Jouha

Richardeau

Azzopardi

2021

Microelectronics Reliability

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This paper presents short-circuit (SC) performance of a commercial silicon-carbide (SiC) MOSFET device under repetitive SC stress at high drain source voltage. Two protocols are investigated to evaluate the impact of gate-source voltage (VGS) depolarization and SC duration (TSC) reduction. The VGS depolarisation provides a power density reduction and allows to preserve a secure failure mode (FTO: Fail To Open) with an increase of the short circuit duration TSCmax. The results demonstrate that SiC MOSFET VGS depolarization does not reduce SC cycling capability at TSCmax. However, using VGS depolarization allows to get performance close to IGBT robustness levels with almost 1000 cycles @TSC=10µs. The simulation of the chip temperature evolution during SC tests suggests that the degradations stay attributed to the increase of junction temperature (TJ) during the SC cycles, which leads to the fusion of the top Al inducing cracks into the thick oxide.

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“…It is clearly visible that the Al layer is above its melting point with a high thermal energy injected into its liquid phase. Furthermore, according to [10], at the Al melting temperature, the thick oxide is already cracked because the mechanical stress at the upper corner greatly exceeds its mechanical strength.…”

Section: Short-circuit Ageing Analysismentioning

confidence: 99%

Gate-damage accumulation and off-line recovery in SiC power MOSFETs with soft short-circuit failure mode

Castellazzi

Richardeau

Borghese

et al. 2020

Microelectronics Reliability

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This paper proposes the detailed analysis of the short-circuit failure mechanism of a particular class of silicon carbide (SiC) power MOSFETs, exhibiting a safe fail-to-open-circuit type signature. The results are based on extensive experimental testing, including both functional and structural characterisation of the transistors, specifically devised to bring along gradual degradation and progressive damage accumulation. It is shown that the soft failure feature is associated with degradation and eventual partial shorting of the gate-source structure. Moreover, partial recovery, induced here by ad-hoc off-line biasing, is observed on degraded components. The results indicate that it is a realistic new option for deployment in the application to yield enhanced system level robustness and system-level hopping-home operational mode capability, of great importance in a number of reliability critical domains, such as, for instance, transportation.

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Gate Failure Physics of SiC MOSFETs Under Short-Circuit Stress

Cited by 70 publications

References 18 publications

WBG-Based PEBB Module for High Reliability Power Converters

WBG-Based PEBB Module for High Reliability Power Converters

Repetitive short circuit capability of SiC MOSFET at specific low gate-source voltage bias for more robust extreme operation

Gate-damage accumulation and off-line recovery in SiC power MOSFETs with soft short-circuit failure mode

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