Gate All Around 22 nm SOI Schottky Barrier MOSFET with High ION/IOFF Current Ratio for Low-Power Digital and Analog Circuit Applications

Saxena, Amit; Sharma, R. K.; Kumar, Manoj; Gupta, R. S.

doi:10.1007/978-981-99-0412-9_6

Lecture Notes in Electrical Engineering

2023

DOI: 10.1007/978-981-99-0412-9_6

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Gate All Around 22 nm SOI Schottky Barrier MOSFET with High ION/IOFF Current Ratio for Low-Power Digital and Analog Circuit Applications

Amit Saxena

R. K. Sharma

Manoj Kumar

et al.

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2024

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RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications

Kumar,

Mahajan,

Deswal

et al. 2024

Microsyst Technol

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RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications

Kumar,

Mahajan,

Deswal

et al. 2024

Microsyst Technol

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Gate All Around 22 nm SOI Schottky Barrier MOSFET with High ION/IOFF Current Ratio for Low-Power Digital and Analog Circuit Applications

Cited by 1 publication

References 6 publications

RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications

RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications

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