Gas Discharge Lamps Are Volatile Memristors

Lin, D.; Hui, S. Y. Ron; Chua, Leon O.

doi:10.1109/tcsi.2014.2304659

Cited by 36 publications

(15 citation statements)

References 26 publications

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“…The coexistence of hysteretic memristive and memcapacitive behavior is analyzed in [60], [61]. Gas discharge lamps are the subclass of memristors having non-crossing PHLs [31] and inverse hysteresis in the flux-charge plane [62].…”

Section: Introductionmentioning

confidence: 99%

Takacs Model of Hysteresis in Mathematical Modeling of Memristors

Juhas¹,

Dautovic²,

Samardžić³

2020

RADIOENGINEERING

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In this paper, the mathematical modeling of memristor via Takacs model of hysteresis is presented along with a modification of this model tailored to describe the asymmetric hysteresis loop and first order reversal curves. In particular, it is shown that there is a class of differential equations of the Duhem model of hysteresis where every member of the class could play a role of the state equation of memristor. Within this class of Duhem differential equations, there are two distinct subclasses: one corresponding to the Takacs model and the other one corresponding to the state equations of the memristor model with the Biolek window function of various degrees p. These two subclasses have a non-empty intersection, which contains the state equation of the memristor model with the Biolek window function for p = 1. To demonstrate the proposed approach, three examples are presented.

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Section: Introductionmentioning

confidence: 99%

Takacs Model of Hysteresis in Mathematical Modeling of Memristors

Juhas¹,

Dautovic²,

Samardžić³

2020

RADIOENGINEERING

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“…The memristor has also been proposed as the electronic analog of biological synapses [16], [17]. It is essentially a resistor with memory; it is nonvolatile (although volatile devices have been also reported [18] and the specific theory can be found in [19]), its response depends on its whole dynamical history, and it demonstrates a continuous set of resistance values, making it ideal for tuning synaptic weights of artificial neural networks (ANNs) [20][21][22]. An ANN is a data-processing model based on the biological nervous system, implemented as a parallel and distributed network of simple nonlinear processing units [23].…”

Section: Introductionmentioning

confidence: 99%

Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator

Ntinas

Vourkas

Abusleme

et al. 2018

IEEE Trans. Neural Netw. Learning Syst.

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This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator.

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“…However, existing hysteresis modelling methods are not applicable to memristors. Although some memristors, such as discharge arc and lamps [18] can be described with coupled non‐linear differential equations or described in a state‐space approach [19], there is no graphical method (similar to the Preisach model for non‐pinched hysteresis loops) available for general modelling of pinched hysteresis loops.…”

Section: Introductionmentioning

confidence: 99%

Graphical modelling of pinched hysteresis loops of memristors

Hui

2017

IET Science, Measurement & Technology

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Abstract:In this paper, a graphical modelling approach of the pinched hysteresis loops exhibited by memristors is presented. This method provides a tool to emulate the hysteresis loop pinched at the origin, with the lobe area varying with the excitation frequency. The direction of the pinched hysteresis loop can be controlled. This graphical modelling method provides an alternative to describe the behaviour of memristors without deriving the coupled nonlinear differential equations typically required for physical memristors. The method has been successfully applied to model the Hewlett-Packard memristor device.

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Gas Discharge Lamps Are Volatile Memristors

Cited by 36 publications

References 26 publications

Takacs Model of Hysteresis in Mathematical Modeling of Memristors

Takacs Model of Hysteresis in Mathematical Modeling of Memristors

Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator

Graphical modelling of pinched hysteresis loops of memristors

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