GaN technologies and developments: Status and trends

Buchta, M.; Beilenhoff, K.; Blanck, H.; Thorpe, J.; Behtash, R.; Heckmann, S.; Jung, Helmut; Ouarch, Z.; Camiade, M.

doi:10.1109/icmmt.2010.5525238

Cited by 8 publications

(5 citation statements)

References 4 publications

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“…Creation of traps can occur in both the AlGaN layer and the buffer, leading to reversible degradation of transconductance and saturated drain current [ 2 , 5 , 11 ]. GaN is a piezoelectric material and under high bias conditions, the electric field induces additional tensile stress to the already strained AlGaN layer [ 20 , 21 , 22 , 23 , 24 , 25 , 26 ]. Several authors have shown that upon reaching a “critical voltage”, irreversible damage to the device occurs resulting in defect formation through which electron leakage can occur [ 10 , 11 , 12 , 13 , 14 ].…”

Section: Gan Degradation Mechanismsmentioning

confidence: 99%

“…Permanent device degradation after high V DG stress under on-state conditions has been attributed to the presence of hot electrons. In GaAs-based devices, hot electrons generate holes which are accumulated by the gate and result in a negative shift in V T [ 25 , 26 , 27 ]. Typically, I G is used to derive the field-acceleration laws for failure.…”

Section: Gan Degradation Mechanismsmentioning

confidence: 99%

“…The most commonly reported degradation mechanisms for both GaAs and InP-based HEMTs include contact problems (such as sinking gates in which the gate metal begins to react with the underlying semiconductor), creation of surface states (which can be manifested as what is commonly called gate lag), hot carrier-induced (impact ionization at gate edge), mechanical stress (the absorption of H into Ti-based Schottky gates can lead to compressive stress due to piezo effects in the semiconductor) [ 3 ], or avalanche breakdown in the semiconductor, fluorine contamination, and corrosion (mainly related to Al oxidation) [ 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 , 22 , 23 , 24 , 25 , 26 , 27 , 28 , 29 , 30 ]. Metamorphic HEMT (MHEMT) technology has been developed using metamorphic buffer layers to grow InAlAs/InGaAs on larger diameter GaAs substrates to overcome the limitations of InP substrates: smaller wafer size, higher cost, and brittle nature.…”

Section: Gaas Hemtsmentioning

confidence: 99%

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Degradation Mechanisms for GaN and GaAs High Speed Transistors

et al. 2012

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We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs) as well as Heterojunction Bipolar Transistors (HBTs) in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate), and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

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Section: Gan Degradation Mechanismsmentioning

confidence: 99%

Section: Gan Degradation Mechanismsmentioning

confidence: 99%

Section: Gaas Hemtsmentioning

confidence: 99%

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Degradation Mechanisms for GaN and GaAs High Speed Transistors

et al. 2012

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“…In this light, Europe has been funding research project on GaN technologies for at least a decade [18,19], as well as a recent project specifically oriented to millimeter-wave applications through GaN-on-Si technologies, named MiGaNSOS (Millimeter wave Gallium Nitride Space evaluation and application to Observation Satellites) [20]. Among the project's objectives, the first consists in assessing and space-evaluating a state-of-the-art GaN-on-Si process for open foundry use, namely the 100 nm gate length GaN-on-Si technology developed by OMMIC (commercial name D01GH); at the same time, a preliminary assessment of its 60 nm evolution (D006GH) has been planned.…”

Section: Introductionmentioning

confidence: 99%

Linear Characterization and Modeling of GaN-on-Si HEMT Technologies with 100 nm and 60 nm Gate Lengths

et al. 2021

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Motivated by the growing interest towards low-cost, restriction-free MMIC processes suitable for multi-function, possibly space-qualified applications, this contribution reports the extraction of reliable linear models for two advanced GaN-on-Si HEMT technologies, namely OMMIC’s D01GH (100 nm gate length) and D006GH (60 nm gate length). This objective is pursued by means of both classical and more novel approaches. In particular, the latter include a nondestructive method for determining the extrinsic resistances and an optimizaion-based approach to extracting the remaining parasitic elements: these support standard DC and RF measurements in order to obtain a scalable, bias-dependent equivalent-circuit model capturing the small-signal behavior of the two processes. As to the noise model, this is extracted by applying the well known noise-temperature approach to noise figure measurements performed in two different frequency ranges: a lower band, where a standard Y-factor test bench is used, and an upper band, where a custom cold-source test bench is set up and described in great detail. At 5 V drain-source voltage, minimum noise figures as low as 1.5 dB and 1.1 dB at 40 GHz have been extracted for the considered 100 nm and 60 nm HEMTs, respectively: this testifies the maturity of both processes and the effectiveness of the gate length reduction. The characterization and modeling campaign, here presented for the first time, has been repeatedly validated by published designs, a couple of which are reviewed for the Reader’s convenience.

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“…Numerous studies have investigated the role of device design (6,13,14), device structure (7,11,(15)(16)(17)(18), and bias conditions (4,(19)(20)(21) on the reliability of AlGaN/GaN HEMTs. From these studies, several degradation mechanisms have been reported in literature, ranging from hot carrier degradation, consumption of interfacial oxide layers below the gate resulting in shift of the Shottky barrier height, and even physical defect formation at the gate edges resulting in increased gate leakage (22)(23)(24).…”

Section: Introductionmentioning

confidence: 99%

GaN High Electron Mobility Transistor Degradation: Effect of RF Stress

et al. 2013

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Sub-micron AlGaN/GaN high electron mobility transistors were RF stressed at various drain bias conditions at 10 GHz under 3 dB and 3.7 dB compression. Rapid degradation was observed above a drain bias of 20 V, with significant degradation of the Schottky contact. Additionally, electroluminescence and cathodoluminescence was performed on stressed devices. Localization of 2.2 eV defect emission was observed on a device suffering from infant mortality.

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GaN technologies and developments: Status and trends

Cited by 8 publications

References 4 publications

Degradation Mechanisms for GaN and GaAs High Speed Transistors

Degradation Mechanisms for GaN and GaAs High Speed Transistors

Linear Characterization and Modeling of GaN-on-Si HEMT Technologies with 100 nm and 60 nm Gate Lengths

GaN High Electron Mobility Transistor Degradation: Effect of RF Stress

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