GaN-Based Active Gate-Drive Unit for IGBTs in Medium-Voltage Applications

Beushausen, Steffen; Wienhausen, Arne Hendrik; Doncker, Rik W. De

doi:10.23919/epe.2019.8914945

Cited by 5 publications

(3 citation statements)

References 6 publications

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“…3(b). Different realizations either limit the gate time constant, e.g., by using different gate resistance values [27], [28], [29] or by implementing closed-loop gate control [30], [31]. An alternative implementation not only modifies the gate time constant but also artificially increases the gate-to-drain capacitance C GD of the MOSFET with an external so-called Miller capacitance C M between drain and gate (in the range of few pF, hence very small) as shown in Fig.…”

Section: B Gate Driver Based DV V/dt-limitationmentioning

confidence: 99%

Comparative Evaluation of Gate Driver and LC-Filter Based dv/dt-Limitation for SiC-Based Motor-Integrated Variable Speed Drive Inverters

Haider,

Niklaus,

Madlener

et al. 2023

IEEE Open J. Power Electron.

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Compared to state-of-the-art IGBTs, SiC power semiconductors allow to achieve ever higher system efficiencies and higher power densities in next-generation Variable Speed Drives (VSDs), thanks to their smaller relative chip size, ohmic on-state characteristic and lower specific switching losses resulting in a smaller switching-stage footprint and lower heat sink as well as DC-link capacitor volumes. However, the high slew rate of the switching transitions, an inherent consequence of the low switching losses, represents a major challenge and potentially results in lifetime degrading unequal voltage distribution across the motor windings and bearing currents. This work analytically and experimentally compares different means for dv/dt-limitation, namely, a conventional passive LC-dv/dt-filter and a Gate Driver (GD)-based approach based on increased GD resistances in combination with explicit Miller capacitors, at the example of a 10 kW industrial motor-integrated VSD. For a state-of-the-art dv/dt-limitation of up to 6 V/ns the LC-filter shows lower losses compared to the GD-based limitation. The latter, however, has a higher part-load efficiency and/or lower losses compared to the (roughly) load independent losses in the LC-filter resulting from the dissipation of the energy stored in the filter capacitor within each switching cycle, beneficial for light loads, e.g., < 40 % of rated output power. Next-generation motors with reinforced insulation allow a dv/dt-limitation of up to 15 V/ns. In this case, the GD-based limitation shows lower losses in the whole operating range, since they directly scale with the now smaller overlap of voltage and current resulting from the faster switching transitions. Considering a state-of-the-art motor, finally, a hardware demonstrator of a three-phase VSD employing an LC-filter to limit the dv/dt to 5.6 V/ns is realized, which achieves a full inverter stage power density of 30 kW/dm 3 (497 W/in 3 ) and an inverter efficiency of > 99 %.INDEX TERMS Gate drivers, permanent magnet motors, pulse width modulation converters, silicon carbide, transmission lines, variable speed drives.

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Section: B Gate Driver Based DV V/dt-limitationmentioning

confidence: 99%

Comparative Evaluation of Gate Driver and LC-Filter Based dv/dt-Limitation for SiC-Based Motor-Integrated Variable Speed Drive Inverters

Haider,

Niklaus,

Madlener

et al. 2023

IEEE Open J. Power Electron.

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“…The last approach is the active gate control (open-loop and closed-loop) which includes an automatic control method for individual IGBTs [20][21][22][23][24][25]. Automated delay time compensation as an active gate control method is presented in [20] by Alvarez.…”

Section: Introductionmentioning

confidence: 99%

“…Active current balancing, as a form of independent delay control aiming to minimize current peaks during switching transients, is presented in [24] by Tripathi, Tsukuda and Omura. Beushausen, Herzog and Doncker [25] propose an active gate control in terms of voltage slope duCE/dt closed-loop control in medium-voltage applications.…”

Section: Introductionmentioning

confidence: 99%

Temperature Control Concept for Parallel IGBT Operation

et al. 2021

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This paper addresses the concept of load balancing in the operation of parallel insulated-gate bipolar transistors (IGBTs), in which the temperature is used as the main control parameter. In parallel IGBT operation, it is essential to ensure an equal load distribution across all IGBTs. Two basic algorithm concepts for temperature control were developed for the purpose of balancing. A test model based on the parallel IGBTs operation was assembled in a laboratory and the developed algorithms were tested for the chosen parameters. MATLAB was used for final data processing. The comparison between the two implemented basic algorithms provides insights into the temperature behavior of parallel IGBTs in terms of individual IGBT’s heating and cooling trajectories and time constants. All tests were conducted without the heatsinks to obtain the worst-case scenario in terms of thermal conditions. The test results show that temperature control in the operation of parallel IGBTs is possible but limited.

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