Future directions for higher-efficiency HIT solar cells using a Thin Silicon Wafer

Tohoda, Satoshi; Fujishima, Daisuke; Yano, Ayumu; Ogane, Akiyoshi; Matsuyama, K.; Nakamura, Yuya; Tokuoka, Nozomu; Kanno, Hiroshi; Kinoshita, Toshihiro; Sakata, Hitoshi; Taguchi, Mikio; Maruyama, Eiji

doi:10.1016/j.jnoncrysol.2012.03.025

Cited by 65 publications

(20 citation statements)

References 4 publications

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“…These can be fabricated below 200°C and hence one can use a very thin silicon wafer. The Sanyo Electric Co. (Japan) recently has achieved 22.8% efficiency using only 58 μm thick wafer and 23.7% for 98 μm thick wafers [1]. However, the interface (a-Si:H/c-Si) properties in such devices play a very crucial role for the device performance.…”

Section: Introductionmentioning

confidence: 99%

Passivation study of multi-crystalline silicon wafer with i-a-Si:H layer deposited by HWCVD

Agarwal

Dusane

2015

Thin Solid Films

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Section: Introductionmentioning

confidence: 99%

Passivation study of multi-crystalline silicon wafer with i-a-Si:H layer deposited by HWCVD

Agarwal

Dusane

2015

Thin Solid Films

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“…The HIT solar cell also exhibits decreased recombination at the interface and improved Voc due to the insertion of a very thin amorphous layer. The cell can also generate electricity from light reflected by its rear side 4–7…”

Section: Introductionmentioning

confidence: 99%

Development of Selective Electroless‐Deposited Electrode in Heterojunction with Intrinsic Thin‐Layer Solar Cell

Kim

Park

Choi

et al. 2015

Israel Journal of Chemistry

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In this paper, we describe selective deposition of a major electrode and a protection electrode in a heterojunction with intrinsic thin‐layer (HIT) type solar cell. Sn and Ni were used for the protection electrode to prevent the oxidation of Cu, which was used for the main electrode. SEM and TEM were used to analyze the microstructural evolution and changes in the interface as a result of each electroless deposition. Finally, the performance of our solar cell created via electroless deposition was evaluated. We determined the photovoltaic conversion efficiency (PCE) to be 16.4 %, the fill factor (FF) to be 72.2 %, the open circuit voltage (Voc) to be 681 mV, and the short circuit current (Jsc) to be 33.0 mA/cm2. These output values match the performance of an Ag screen‐printed solar cell and demonstrate the possibility of commercializing an inexpensive HIT solar cell with high efficiency.

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“…Silicon heterojunction solar cells (SHJ) are extremely appealing technology promising high conversion efficiency and low fabrication cost [1][2][3] in comparing to the traditional wafer based silicon solar cells. The SHJ structure consist of heterojunction between amorphous silicon and crystalline silicon and the output performances are strongly associated with the well-developed fabrication process of the heterointerface.…”

Section: Introductionmentioning

confidence: 99%

Electrical and Capacitance Diagnostic Techniques as a Support for the Development of Silicon Heterojunction Solar Cells

Mikolášek

Nemec

Kováč

et al. 2014

Journal of Electrical Engineering

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In this paper we present the utilization of capacitance and current-voltage diagnostic techniques to analyse silicon heterojunction solar cell structures properties, particularly focused on the inspection of the amorphous emitter and amorphous silicon/crystalline silicon hetero-interface. The capacitance characterization of investigated samples have revealed the need for improvement of the a-Si:H/c-Si heterointerface quality as a main direction to obtain superior output performance of heterojunction cells. In addition, current-voltage characterization emphasized importance for enhancement of the light management in the structure. The obtained results demonstrate that electrical and capacitance diagnostic techniques can represents important diagnostic tools in the process of optimization of solar cells.K e y w o r d s:

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Future directions for higher-efficiency HIT solar cells using a Thin Silicon Wafer

Cited by 65 publications

References 4 publications

Passivation study of multi-crystalline silicon wafer with i-a-Si:H layer deposited by HWCVD

Passivation study of multi-crystalline silicon wafer with i-a-Si:H layer deposited by HWCVD

Development of Selective Electroless‐Deposited Electrode in Heterojunction with Intrinsic Thin‐Layer Solar Cell

Electrical and Capacitance Diagnostic Techniques as a Support for the Development of Silicon Heterojunction Solar Cells

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