Fundamentals of Heat Dissipation in 3D IC Packaging

Investigation of the Dynamics of Liquid Cooling of 3D ICs

“…In the case of the vertically stacked 3D IC chips, there are multiple heated surfaces, and it is almost impossible to place those bulky heat sinks on top of each of the stacked layers. Cooling from the surface would not be as efficient, since heat coming from the inside layers will have a long heat path that complicates the cooling process, unless fast heat removal techniques can be employed [2].…”

Advances in thermal conductivity for energy applications: a review

“…Chip level thermal management for data centers involves a combination of active and passive cooling [145]. In a 3D IC chip stack, a promising active method is microchannel cooling embedded in the dies (e.g.…”

“…In a 3D IC chip stack, a promising active method is microchannel cooling embedded in the dies (e.g. by backside etching) (cooling layer in figure 2(c)) [140,145]. The integration and placement of microchannel cooling with the Through-silicon-vias (TSVs, for communication between devices in different layers, see figure 2(b)) and inter-layers are still challenging which requires co-design and innovation of the device [159][160][161].…”

“…Thus, passive heat conduction spreading using high-k materials is especially important. In 3D ICs, the unique conduction through thermal vias as well as the TSVs (usually made of Cu) and the inter-layer between the dies also requires high-k materials and design optimization [145,169,170].…”