2019
DOI: 10.1109/tcsii.2019.2921895
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Fully Configurable Capacitor-Less Oversampling DC Offset Cancellation for Direct Conversion Receivers

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Cited by 7 publications
(2 citation statements)
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“…The DC offset is accumulated stage by stage along the cascaded amplifier chain, and is detected as an additional differential input signal by the rectifier. As a result, the output of the PD may be much larger than that indicated by the actual input signal, even saturate the signal chain, which deteriorate in detection accuracy severely [24,25,26]. The DC offset voltage of the proposed PD is simulated to be about 0.01mV, which can be amplified by the 6-stage limiting amplifier chain to as large as 10mV.…”
Section: Offset Compensation Loopmentioning
confidence: 99%
“…The DC offset is accumulated stage by stage along the cascaded amplifier chain, and is detected as an additional differential input signal by the rectifier. As a result, the output of the PD may be much larger than that indicated by the actual input signal, even saturate the signal chain, which deteriorate in detection accuracy severely [24,25,26]. The DC offset voltage of the proposed PD is simulated to be about 0.01mV, which can be amplified by the 6-stage limiting amplifier chain to as large as 10mV.…”
Section: Offset Compensation Loopmentioning
confidence: 99%
“…Droop compensation is addressed in [4], [15]. DC offset cancellation circuits in the analog domain and in the digital domain are presented in [16] and [17], respectively.…”
Section: Introductionmentioning
confidence: 99%