2019
DOI: 10.1016/j.nima.2019.05.047
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Front-end ASIC for spectroscopic readout of virtual Frisch-grid CZT bar sensors

Abstract: Compact multi-channel radiation detectors rely on low noise front-end application specific integrated circuits (ASICs) to achieve high spectral resolution. Here, a new ASIC developed to readout virtual Frisch-grid cadmium zinc telluride (VFG CZT) detectors for gamma ray spectroscopy is presented.Corresponding to each ionizing event in the detector, the ASIC measures the amplitude and timing at the anode, the cathode and four pad sense electrodes associated with each sensor in a detector array. The ASIC is comp… Show more

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Cited by 12 publications
(8 citation statements)
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“…The module is read out by a single low-noise custom ASIC designed for the Frisch-grid detector 34 that is connected to the anode (bottom) side of the module. The top board of the module distributes an external 2500 V high-voltage source to bias the detectors.…”
Section: Czt Low Energy Calorimeter Prototypementioning
confidence: 99%
“…The module is read out by a single low-noise custom ASIC designed for the Frisch-grid detector 34 that is connected to the anode (bottom) side of the module. The top board of the module distributes an external 2500 V high-voltage source to bias the detectors.…”
Section: Czt Low Energy Calorimeter Prototypementioning
confidence: 99%
“…The crate is read out by a custom low-noise ASIC called the advanced virtual Frisch-Grid 2 (AVG2). 20 An Altera Arria GX FPGA then handles the data recording and ASIC controls. In ComPair, there are a total of 9 crates arranged in a 3 × 3 array, shown in Fig.…”
Section: Low-energy Calorimeter: Cztmentioning
confidence: 99%
“…The CZT subsystem has undergone rigorous testing with its performance reported numerous times. 16,19,20 The CsI calorimeter's response to muons at around sea level using all channels. Note that (b) treats each interaction in the calorimeter as an independent event.…”
Section: Individual System Performancementioning
confidence: 99%
“…The bars are arranged in a 4 × 4 module and connected to a readout ASIC (the AVG2 [8]) and FPGA module which controls readout. An individual module is 2.5 cm × 2.5 cm, the ComPair…”
Section: Pos(icrc2019)565mentioning
confidence: 99%