1988
DOI: 10.1109/23.25464
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From substrate to VLSI: investigation of hardened SIMOX without epitaxy, for dose, dose rate and SEU phenomena

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Cited by 65 publications
(14 citation statements)
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“…Thc HSOI3-HD tcchnology is a polycide gate CMOS-SO1 process [2,31. Thc SIMOX substrate is realized by 200 keV O+ ion implantation at 500-700OC followed by annealing at 1300-1 350OC.…”
Section: Methodsmentioning
confidence: 99%
“…Thc HSOI3-HD tcchnology is a polycide gate CMOS-SO1 process [2,31. Thc SIMOX substrate is realized by 200 keV O+ ion implantation at 500-700OC followed by annealing at 1300-1 350OC.…”
Section: Methodsmentioning
confidence: 99%
“…It is possible to harden partially depleted SOI transistors such that they can withstand high doses of gamma or X-rays [1]. Dose hardening of fully depleted SOI devices is much more elusive because of the coupling between front and back gates and the impossibility of realizing a high-threshold back interface [2].…”
Section: Introductionmentioning
confidence: 99%
“…Even relatively immune SOI technology has been shown to display soft errors [1], [2]. Modeling of individual devices and full circuits using a variety of simulation tools has been undertaken to understand and predict soft error rates (SER) due to -particles, heavy ions, and cosmic rays [3]- [5].…”
Section: Introductionmentioning
confidence: 99%