FPGA Implementation of the Multilayer Neural Network for the Speed Estimation of the Two-Mass Drive System

Orłowska-Kowalska, Teresa; Kaminski, Marcin

doi:10.1109/tii.2011.2158843

Cited by 129 publications

(32 citation statements)

References 32 publications

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“…On one hand, the hardware part requires taking into account various parameters including component compatibility, signal conditioning, placing and routing problems, while on the other hand, the software part must consider the architecture of the equipment. However, in this case, the software application takes advantage of the facilities provided by graphical programming [28]. The following two sections will present how the hardware and software had been developed in the case of the example application.…”

Section: Hardware and Software Setupmentioning

confidence: 99%

A Portable Implementation on Industrial Devices of a Predictive Controller Using Graphical Programming

Folea

Moiş

Muresan

et al. 2016

IEEE Trans. Ind. Inf.

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Abstract-This paper presents an approach for developing an extended prediction self-adaptive controller employing graphical programming of industrial standard devices for controlling fast processes. For comparison purposes, the algorithm has been implemented on three different field-programmable gate arrays (FPGAs) chips. This paper presents research aspects regarding graphicalprogramming controller design, showing that a single advanced control application can run on different targets without requiring significant program modifications. Based on the time needed for processing the control signal and on the application, one can efficiently and easily select the most appropriate device. To exemplify the procedure, a conclusive case study is presented.

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Section: Hardware and Software Setupmentioning

confidence: 99%

A Portable Implementation on Industrial Devices of a Predictive Controller Using Graphical Programming

Folea

Moiş

Muresan

et al. 2016

IEEE Trans. Ind. Inf.

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“…The performance of the cluster of FPGAs implementation has been compared with an HPC implementation resulting in an improvement of the speed up and in terms of solving the scalability problems of this algorithm. A practical implementation of a neural network based estimator of the load machine speed for a drive system with elastic coupling, using an FPGA placed inside the NI CompactRIO controller is presented in [16]. The algorithm code for the neural estimator implemented in C-RIO was performed using the LabVIEW software.…”

Section: Related Workmentioning

confidence: 99%

Multicore and FPGA implementations of emotional-based agent architectures

et al. 2014

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Control architectures based on Emotions are becoming promising solutions for the implementation of future robotic agents. The basic controllers of the architecture are the emotional processes that decide which behaviors of the robot must activate to fulfill the objectives. The number of emotional processes increases (hundreds of millions/s) with the complexity level of the application, limiting the processing capacity of the main processor to solve complex problems (millions of decisions in a given instant). However, the potential parallelism of the emotional processes permits their execution in parallel on FPGAs or Multicores, thus enabling slack computing in the main processor to tackle more complex dynamic problems. In this paper, an emotional architecture for mobile robotic agents is presented. The workload of the emotional processes is evaluated. Then, the main processor is extended with FPGA co-processors, which are in charged of the parallel execution of the emotional processes. Different Stratix FPGAs are compared to analyze their suitability to cope with the proposed mobile robotic agent applications.The applications are set-up taking into account different environmental conditions, robot dynamics and emotional states. Moreover, the applications are run also on Multicore processors to compare their performance in relation to the FPGAs. Experimental results show that, Stratix IV FPGA increases the performance in about one order of magnitude over the main processor and solves all the considered problems. Quad-Core increases the performance in 3.64 times, allowing to tackle about 89% of the considered problems. Stratix III could be applied to solve problems with around the double of the requirements that the main processor could support and a Dual-Core provides slightly better performance than stratix III and it is relatively cheaper.

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“…As this design methodology resembles to software development, it has been proven to lead to a similar degree of faults in the implementation [30]. However, modern design tools, like LabView FPGA [17], [31], DSP Builder [23] or System Generator [32], [33] are gaining momentum. It has been proven [32] that System Generator can lead to comparable results in terms of obtained speed as HDL description for complex designs.…”

Section: Simulink Modeling and Design Of An Efficientmentioning

confidence: 99%

Simulink Modeling and Design of an Efficient Hardware-Constrained FPGA-Based PMSM Speed Controller

Alecsa

Cirstea

Onea

2012

IEEE Trans. Ind. Inf.

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FPGA Implementation of the Multilayer Neural Network for the Speed Estimation of the Two-Mass Drive System

Cited by 129 publications

References 32 publications

A Portable Implementation on Industrial Devices of a Predictive Controller Using Graphical Programming

A Portable Implementation on Industrial Devices of a Predictive Controller Using Graphical Programming

Multicore and FPGA implementations of emotional-based agent architectures

Simulink Modeling and Design of an Efficient Hardware-Constrained FPGA-Based PMSM Speed Controller

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