2013 International Conference on Communication and Signal Processing 2013
DOI: 10.1109/iccsp.2013.6577213
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FPGA implementation of moving object detection in frames by using background subtraction algorithm

Abstract: In this paper a new background subtraction algorithm was developed to detect moving objects from a stable system in which visual surveillance plays a major role. Among all existing algorithms it was choosen because of low computational complexity which is the major parameter of time in VLSI. The concept of the background subtraction is to subtract the current image with respect to the reference image and compare it with to the certain threshold values. Here we have written the core processor Microblaze is desi… Show more

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Cited by 22 publications
(13 citation statements)
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“…The hardware requirements of proposed and existing object detection architecture are given in Table 4. The architecture presented by Chodwary et al, [29] requires 1180 slice registers and 2118 fully used flip-flop pairs. This architecture is implemented by using Microblaze processor and the scripting is done by using C-language.…”
Section: Performance Parameters Of Proposed Object Detectionmentioning
confidence: 99%
“…The hardware requirements of proposed and existing object detection architecture are given in Table 4. The architecture presented by Chodwary et al, [29] requires 1180 slice registers and 2118 fully used flip-flop pairs. This architecture is implemented by using Microblaze processor and the scripting is done by using C-language.…”
Section: Performance Parameters Of Proposed Object Detectionmentioning
confidence: 99%
“…These methods of hardware based motion detection reported in literature differ from each other due to design methodologies/approaches and design tool chains used. Based on design methodologies, various hardware based methods can be categorized as general purpose processor based approach, digital signal processor (DSP) based approach [24][25][26], complex programmable logic device (CPLD) based approach [27], application specific integrated circuit (ASIC) based approach [28,29], FPGA based hardware design approach [30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48][49], and FPGA based hardware/software co-design approach [50][51][52]. From design tool-chain perspective, the differences can be based on the use of VHDL/Verilog, high level hardware description language like Handle-C or SystemC, MATLAB-Simulink software, an Embedded Development kit, and a System Generator tool.…”
Section: Introductionmentioning
confidence: 99%
“…Now, we present a short introduction to the background update approach suggested by authors in [26] that is based on a dynamic matrix. First, a dynamic matrix D(k) is analyzed in order to have a decision whether this pixel appertains to the foreground or not.…”
Section: Background Updatementioning
confidence: 99%