FPGA implementation of MD5 hash algorithm

Deepakumara, Janaka; Heys, Howard M.; Venkatesan, R.

doi:10.1109/ccece.2001.933564

Cited by 79 publications

(39 citation statements)

References 3 publications

(4 reference statements)

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“…The throughput of the MD5 design by Deepakumara et al [6] was 165 Mbps and that of Diez et al [7] was 467.3 Mbps. The MD5 designs of Deepakumara et al [6] ---------------------------pipeline stage k = round n Diez et al [7] used Virtex V1000FG680-6 and Virtex 2V3000, respectively. Implementation on Virtex-II by Jarvinen et al [8] provided a maximum frequency of 78.3 MHz and 607 Mbps throughput.…”

Section: Resultsmentioning

confidence: 95%

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High-Throughput Message Digest (MD5) Design and Simulation-Based Power Estimation Using Unfolding Transformation

Suhaili¹,

Watanabe²

2017

Journal of Signal Processing

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The high throughput of the cryptographic hash function has become an important aspect of the hardware implementation of security system design. There are several methods that can be used to improve the throughput performance of MD5 design. In this paper, four types of MD5 design were proposed: MD5 iterative design, MD5 unfolding design, MD5 unfolding with 4 stages of pipelining design and MD5 unfolding with 32 stages of pipelining design. The results indicated that MD5 unfolding with 32 stages pipelining of design provides a high throughput compared with other MD5 designs. By using an unfolding transformation factor of 2, the number of cycles of MD5 design was reduced from 64 to 32. All the proposed designs were successfully designed using Verilog code and simulated using ModelSim. The throughput of MD5 unfolding with 32 stages of pipelining design was increased significantly to 137.97 Gbps, and the power of this MD5 unfolding with 32 stages of pipelining was 750.99 mW. Therefore, it is suggested that an unfolding transformation with a high performance pipelining are applied to MD5 hash function design in order to produce an embedded security system design. This paper is expected to be for improving the maximum frequency and the throughput of MD5 design. Thus, by increasing the number of stages in MD5 unfolding design, the performance of MD5 designs can be improved significantly.

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Section: Resultsmentioning

confidence: 95%

“…The outputs of the MD5 unfolding algorithm are shown in Eq. (6). T represents the first-round calculation of the MD5 algorithm, then it is followed by the second round which outputs Temp.…”

Section: Proposed Unfolding Md5 Algorithmmentioning

confidence: 99%

High-Throughput Message Digest (MD5) Design and Simulation-Based Power Estimation Using Unfolding Transformation

Suhaili¹,

Watanabe²

2017

Journal of Signal Processing

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“…It calculates a 128-bit digest for an arbitrary l-bit message. It is an enhanced version of its predecessor MD4 [5] [6].The algorithm could be described in two stages: Preprocessing and Hash Computation. Preprocessing involves padding a message, parsing the padded message into m-bit blocks, and setting initialization values to be used in hash computation.…”

Section: Md-5 and Sha-1 Algorithmmentioning

confidence: 99%

A Low-Power and High Throughput Reconfigurable Data Integrity Unit for Software Radio

Thulasimani¹,

Madheswaran²

2010

IJCEE

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Abstract-Software Radio terminals being able to reconfigure to various radio access systems, will require robust security mechanism to protect the mobile terminals from unauthorized access and to ensure the integrity of internal process involved in reconfiguration when exchanging information with the network. This paper aims to propose an energy efficient reconfigurable hardware architecture which supports data integrity for the secured downloading of software in reconfigurable receivers.

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“…So if someone wants to read it from database will not able to understand it. To access the application or web, the user must be going through the authentication system by entering correct username and password and hash code generated from password will compared with hash values in database if it equals then user have authority to access that application [1]- [5]. But user name and password authorization faces number of security problems, some problems are mention below: Monitor during data transmission.…”

Section: Introductionmentioning

confidence: 99%

HDL Design and Verification of Hash Based Authentication Algorithms

Singh¹

2017

IJRASET

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In today's world everything is computer based, like internet application, banking application, electronic transaction, electronic commerce and electronic learning. All these electronic transactions needs high privacy and confidentiality i.e. the access to only authorized users. So, we want to enhance the security level of these entire computer or internet based applications. For high privacy and confidentiality the authentication system is proposed. Authentication system provides essential security to password and username for any of the above applications. Authentication systems and digital signature application uses hashing algorithms to make unreadable code from password and kept the code in database. So that no one can understand it by reading from database. To access the application or web, the user must be going through the authentication system by entering correct username and password and hash code generated from password will be compared with hash values in database and if equals then only user have authority to access that application. In this thesis work, we designed MD5 (message digest) and SHA512 (standard hash algorithm) hashing algorithms in a single hash unit. To optimize the speed of algorithms, pipelining technique is used. The tool used for coding is Xilinx ISE design suite 12.4. The HDL design entry has been done using ISE text editor and synthesis tool used is Xilinx Synthesis Tool (XST) with Virtex-5 FPGA device XC5VLX30. Function verification has been done using ISim simulator. The obtained throughput is 185.05 Mbps for SHA512 and 308.9 Mbps for MD5 resulting into a combined throughput for designed hash unit is 297.3 Mbps. The maximum frequency of designed SHA512 is 277MHz and of MD5 is 162 MHz combining into a single hash unit with frequency of 162MHz.

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FPGA implementation of MD5 hash algorithm

Abstract: In information security, message authentication is an

Cited by 79 publications

References 3 publications

High-Throughput Message Digest (MD5) Design and Simulation-Based Power Estimation Using Unfolding Transformation

High-Throughput Message Digest (MD5) Design and Simulation-Based Power Estimation Using Unfolding Transformation

A Low-Power and High Throughput Reconfigurable Data Integrity Unit for Software Radio

HDL Design and Verification of Hash Based Authentication Algorithms

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