HDL Design and Verification of Hash Based Authentication Algorithms

Abstract

In today's world everything is computer based, like internet application, banking application, electronic transaction, electronic commerce and electronic learning. All these electronic transactions needs high privacy and confidentiality i.e. the access to only authorized users. So, we want to enhance the security level of these entire computer or internet based applications. For high privacy and confidentiality the authentication system is proposed. Authentication system provides essential security to password and username for any of the above applications. Authentication systems and digital signature application uses hashing algorithms to make unreadable code from password and kept the code in database. So that no one can understand it by reading from database. To access the application or web, the user must be going through the authentication system by entering correct username and password and hash code generated from password will be compared with hash values in database and if equals then only user have authority to access that application. In this thesis work, we designed MD5 (message digest) and SHA512 (standard hash algorithm) hashing algorithms in a single hash unit. To optimize the speed of algorithms, pipelining technique is used. The tool used for coding is Xilinx ISE design suite 12.4. The HDL design entry has been done using ISE text editor and synthesis tool used is Xilinx Synthesis Tool (XST) with Virtex-5 FPGA device XC5VLX30. Function verification has been done using ISim simulator. The obtained throughput is 185.05 Mbps for SHA512 and 308.9 Mbps for MD5 resulting into a combined throughput for designed hash unit is 297.3 Mbps. The maximum frequency of designed SHA512 is 277MHz and of MD5 is 162 MHz combining into a single hash unit with frequency of 162MHz.