FPGA design and implementation of a matrix multiplier based accelerator for 3D EKF SLAM

Tertei, Daniel Tortei; Piat, Jonathan; Devy, Michel

doi:10.1109/reconfig.2014.7032523

Cited by 21 publications

(6 citation statements)

References 18 publications

(25 reference statements)

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“…We instantiate four PEs. In terms of latency, performances are close to the theoretical speed-up, see [43]. The reasons for not having instantiated more PEs are tied to resource usage (LUTs for logic and DSP48E embedded multipliers for floating-point calculations), and thus the percentage of the used area on the device which would consequently decrease the maximum operating frequency and/or the power consumption.…”

Section: Vision-based Ekf Accelerator Co-designmentioning

confidence: 66%

HW/SW co-design of a visual SLAM application

Piat

Fillatreau

Tortei

et al. 2018

J Real-Time Image Proc

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Vision-based advanced driver assistance systems (ADAS), appeared in the 2000s, are increasingly integrated on-board mass-produced vehicles, as off-the-shelf low-cost cameras are now available. But ADAS implement most of the timespecific and basic functionalities such as lane departure or control of the distance to other vehicles. Integrating accurate localization and mapping functionalities meeting the constraints of ADAS (high-throughput, low-consumption, and smalldesign footprint) would pave the way towards obstacle detection, identification and tracking on-board vehicles at potential high speed. While the SLAM problem has been widely addressed by the robotics community, very few embedded operational implementations can be found, and they do not meet the ADAS-related constraints. In this paper, we implement the first 3D monocular EKF-SLAM chain on a heterogeneous architecture, on a single System on Chip (SoC), meeting these constraints. In order to do so, we picked up a standard co-design method (Shaout et al. Specification and modeling of hw/sw co-design for heterogeneous embedded systems, 2009) and adapted it to the implementation of potentially any of such complex processing chains. The refined method encompasses a hardware-in-the-loop approach allowing to progressively integrate hardware accelerators on the basis of a systematic rule. We also have designed original hardware accelerators for all the image processing functions involved, and for some algebraic operations involved in the filtering process.

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Section: Vision-based Ekf Accelerator Co-designmentioning

confidence: 66%

HW/SW co-design of a visual SLAM application

Piat

Fillatreau

Tortei

et al. 2018

J Real-Time Image Proc

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“…Similarly, Tertei et al [111] propose an efficient FPGA-SoC hardware architecture for matrix multiplication with systolic arrays to accelerate EKF-SLAM algorithms. The setup of this design is a PLB peripheral to PPC440 hardcore embedded processor on a Virtex5 FPGA, and it achieves a 7.3× speedup with a processing frequency of 44 Hz compared to the pure software implementation.…”

Section: Sparse Slam On Fpgamentioning

confidence: 99%

A Survey of FPGA-Based Robotic Computing

Wan

Bo²,

Li³

et al. 2020

Preprint

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Recent researches on robotics have shown significant improvement, spanning from algorithms, mechanics to hardware architectures. Robotics, including manipulators, legged robots, drones, and autonomous vehicles, are now widely applied in diverse scenarios. However, the high computation and data complexity of robotic algorithms pose great challenges to its applications. On the one hand, CPU platform is flexible to handle multiple robotic tasks. GPU platform has higher computational capacities and easy-touse development frameworks, so they have been widely adopted in several applications. On the other hand, FPGA-based robotic accelerators are becoming increasingly competitive alternatives, especially in latency-critical and power-limited scenarios. With specialized designed hardware logic and algorithm kernels, FPGA-based accelerators can surpass CPU and GPU in performance and energy efficiency. In this paper, we give an overview of previous work on FPGA-based robotic accelerators covering different stages of the robotic system pipeline. An analysis of software and hardware optimization techniques and main technical issues is presented, along with some commercial and space applications, to serve as a guide for future work.

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“…Our previous work on the subject is published in [26] -an EKF accelerator which is a PLB peripheral to PPC440 hard core embedded processor on a Virtex5 FPGA. It does not take into account the symmetry in cross-covariance matrix -related computations (authors in [22] do not mention that fact either).…”

Section: Previous Work and Contributionsmentioning

confidence: 99%

FPGA design of EKF block accelerator for 3D visual SLAM

Tertei

Piat

Devy

2016

Computers & Electrical Engineering

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International audienceThis paper deals with the evaluation of a dedicated architecture to be integrated into an embedded system typically mounted on a micro-aerial vehicle or on smart devices held by an operator. This system performs an Extended Kalman Filter (EKF) based visual odometry (VO) algorithm. An efficient hardware architecture conceived as a systolic array co-processor for EKF loop acceleration is presented. Due to severe limitations in terms of power consumption, real-time performance and physical characteristics of the system (i.e. compactness and weight), this algorithm is implemented entirely as a System On a programmable Chip (SoC) on the Zynq-7020 device. This heterogeneous (processor with reconfigurable hardware) platform consumes less power than a standard microprocessor and provides powerful parallel data processing capabilities: applying hardware/software (hw/sw) co-design allows real-time throughput with a very low power-per-feature rate

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FPGA design and implementation of a matrix multiplier based accelerator for 3D EKF SLAM

Cited by 21 publications

References 18 publications

HW/SW co-design of a visual SLAM application

HW/SW co-design of a visual SLAM application

A Survey of FPGA-Based Robotic Computing

FPGA design of EKF block accelerator for 3D visual SLAM

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