FPGA computation of the 3D heat equation

Abstract

Efficient solution of the heat equation is one of the recursive topics in computational physics. Over the years, different software solutions have been proposed, taking advantage of today's impressive computing power of parallel machines. In this work, we consider a hybrid software-hardware approach making use of a field-programmable gate array platform as a heat equation solver that can be easily attached to a PC using a PCI bus with the goal of obtaining a portable system to be used during field experiments. The system has been successfully used for the non-destructive inspection of soils in mine detection applications based on infrared thermography techniques.

GPU-based infrared thermography for NDE of minefields

“…As this jeopardizes its use for field experiments we have developed a hardware implementation of a heat equation solver. In [4,10] we presented an FPGA-based implementation of such a solver. However, the main drawback of an FPGA implementation is the requirement of the system in terms of memory.…”

“…It is obvious that for very big volumes the throughput will be low because there will be a cue of pending blocks to be processed which degrades the throughput of the system (note the reduction of the throughput for the 1024 x 1024 x 50 volume). In a previous work, [4], we presented an FPGA-based implementation of the heat equation solver. The system included a Virtex-II FPGA and a custom PCB with 6 memory banks.…”

“…An alternative solution is the hardware implementation of the Finite Difference (FD) representation of the thermal model. In [4] we presented such a hardware implementation of the thermal model, by means of an FPGA, achieving an speed up of 10 compared to a purely software solution. However, the main drawback of this implementation is the cost of the FPGA system and its limited performance due to its little amount of memory.…”

Design of Mobile DDR IO Standards Based Portable Devnagari Unicode Reader on FPGA

“…But, no research in Devnagari Unicode Reader(DUR) design has been conducted, which makes this research first of its kind. The aim of this paper is to fill this research gap and design a portable DUR as well as thermal efficient [12] and energy efficient [1,[4][5][6][7][8][9][10][11]. Thermal efficient DUR means that DUR is able to operate in the temperature range of 0 o C-125 o C. Energy efficient DUR means that DUR is able to run with the least amount of energy as compared to their traditional counterpart.…”

“…Kintex-7 FPGA KC705 Evaluation Kit, delivers double the performance using a flexible framework for higher-level systems design that require DDR3, Gigabit Ethernet, PCI Express, and other serial connectivity [3]. In [4], a hybrid software-hardware approach making use of a field-programmable gate array platform as a heat equation solver that can be easily attached to a PC using a PCI bus with the goal of obtaining a portable system to be used during field experiments. According to DVB-S2 standard for LDPC (Low Density Parity Check) codes, a novel LDPC codes encoder circuit structure is designed [5].…”