FPGA Based Single Chip Solution with 1-Wire Protocol for the Design of Smart Sensor Nodes

Perera, M. D. R.; Meegama, R. G. N.; Jayananda, M. K.

doi:10.1155/2014/125874

Cited by 10 publications

(6 citation statements)

References 13 publications

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“…Due to the conditions of 2 Journal of Sensors the 1-wire standard patent protection for creating new slaves as defined in the document [23], only a few publications dealing with this issue have recently been published. However, most of the authors have dealt with a 1-wire [11,[18][19][20] master or slave simulation/emulation [12]. In spite of the strict limitations in the 1-wire standard patent protection, there have been no violations of the 1-wire standard patent in this work.…”

Section: Related Workmentioning

confidence: 97%

“…In the practical application of the slave module, there are several publications where authors used FPGA technology. Perera et al [11] present their "FPGA based single chip solution with 1-Wire protocol for design of smart sensor nodes," where they focus on the implementation of a smart sensor using FPGA technology. When implementing a 1-wire protocol, reference is made to status diagrams describing a method to communicate on a 1-wire bus.…”

Section: Related Workmentioning

confidence: 99%

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ARM-Based Universal 1-Wire Module Solution

Dudak

Tanuška

Gašpar³

et al. 2018

Journal of Sensors

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Sensory networks are part of a solution to monitor the required physical variables in the area of interest. Their type, the used communication protocol, plays an important role in the parameter of their complexity. One of the economical solutions is the usage of a 1-wire communication network that requires only 2 physical wires. The individual sensors or the nodes of the communication network are connected in parallel. The goal was to design and implement a universal low-power 1-wire bus module with a fully implemented 1-wire standard. As a platform for the development of such module, STM32-based microcontroller was chosen. The main advantage of this solution is the ability to utilize a sensor from a large variety of available sensors with a standardized communication interface. Our solution of the universal 1-wire module provides a single interface for sensors with different communication interfaces, while it still communicates with the standard 1-wire bus controller.

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Section: Related Workmentioning

confidence: 97%

Section: Related Workmentioning

confidence: 99%

ARM-Based Universal 1-Wire Module Solution

Dudak

Tanuška

Gašpar³

et al. 2018

Journal of Sensors

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“…Different FPGA platforms were compared [30], to understand the advantages of each platform on its intended scenario. The Basys2 evaluation platform appears to be well accepted in the research community, for both its computational performance [31], low cost and reconfigurability [32].…”

Section: Fpga-based Sensor Networkmentioning

confidence: 99%

Energy Consumption Awareness for Resource-Constrained Devices: Extension to FPGA

Silva

Mal�

Albano

2016

JGE

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The devices running embedded applications tend to be battery-powered, and the energy efficiency of their operations is an important enabler for the wide adoption of the Internet-of-Things. Optimization of energy usage depends on modelling power consumption. A model-based simulation must consider parameters that depend on the device used, the operating system, and the distributed application under study. A realistic simulation thus depends on knowledge regarding how and when devices consume energy. This paper presents an approach to direct measurement of energy consumed in the different execution states of the device. We present the architecture and the measurement process that were implemented. We provide a reference architecture, whose constituent parts can be implemented in different manners, e.g. the processing unit of the device can be the chip on a mote, or an Field-Programmable Gate Array (FPGA) implementation. Details are given regarding the setup of the experimental tests, and a discussion of the results hints at which architecture is the best for each application under study. The presented methodology can be extended easily to new architectures and applications, to streamline the process of building realistic models of power consumption.

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“…This process also entails the design of low power and high-speed circuits for efficient and reliable network monitoring and control. The use of field programmable gate arrays (FPGAs) for autonomous sensor network monitoring and control is an interesting research domain in which low FPGA logic utilization, low power consumption, and accurate sensor readings are the major metrics for evaluation [1][2][3][4][5]. An autonomous sensor network is a special application for system monitoring, which is composed of several components such as a transducer, conditioning circuits, processing units, and data communication.…”

Section: Introductionmentioning

confidence: 99%

“…The proposed scheme can be employed in other related applications. Perera et al [2] presented the design of low-cost, reconfigurable, and programmable smart sensor node using ZigBee. Their design was implemented using FPGA that incorporated the basic functionalities of the IEEE 1451 standard.…”

Section: Introductionmentioning

confidence: 99%

FPGA-Based Design of an Intelligent On-Chip Sensor Network Monitoring and Control Using Dynamically Reconfigurable Autonomous Sensor Agents

Abba

Lee

2016

International Journal of Distributed Sensor Networks

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This paper proposes different low-level microarchitectural designs and frameworks for real-time monitoring and efficient control of on-chip sensor network for field programmable gate arrays (FPGAs). The main goals are to design low power, low-cost, and highly accurate monitoring and control mechanism using autonomous sensor agents and to dynamically reconfigure control of onchip sensor networks by FPGAs. By collecting dynamic and real-time monitoring parameters such as voltage and temperature, the system becomes self-aware and is able to improve the utilization of FPGA resources and power consumption. The FPGA synthesis, place and route, and implementation were performed for the proposed design. The results after synthesis and implementation show a significant low usage of FPGA logic resources and efficient power consumption of all on-chip sensor components compared with previous approaches. Furthermore, the experimental results from the FPGA-measured on-chip sensor readings show high precision and accuracy in the measured voltage and temperature. Setting the dynamic reconfiguration refresh time at 1000 ms produces highly accurate FPGA-measured on-chip sensor readings compared with those at 100 and 500 ms. The proposed design technique and framework will assist network engineers and system designers by providing flexible and efficient real-time monitoring and control design of large and complex on-chip sensor networks and remote-sensing applications.

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FPGA Based Single Chip Solution with 1-Wire Protocol for the Design of Smart Sensor Nodes

Cited by 10 publications

References 13 publications

ARM-Based Universal 1-Wire Module Solution

ARM-Based Universal 1-Wire Module Solution

Energy Consumption Awareness for Resource-Constrained Devices: Extension to FPGA

FPGA-Based Design of an Intelligent On-Chip Sensor Network Monitoring and Control Using Dynamically Reconfigurable Autonomous Sensor Agents

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