Forward Body Bias Technique in DRAM Peripheral Transistor at Cryogenic Temperature for Quantum Computing Applications

You, Hyunseo; An, Jehyun; Nam, Kihoon; Kang, Bohyeon; Park, Jongseo; Lee, Namhyun; Baek, Rock‐Hyun

doi:10.1109/edtm55494.2023.10102979

Cited by 2 publications

(1 citation statement)

References 10 publications

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“…However, an increased threshold voltage (Vth) at cryogenic temperatures is undesirable in the circuit design for a multi-Vth scheme [5]. Therefore, various studies on Vth tuning have been conducted at cryogenic temperatures [6], [7], [8], [9], [10], [11]. Particularly, in our previous study [11], we revealed that a forward body bias (FBB) technique could effectively modulate Vth because an FBB reduced Vth and improved the drive current.…”

Section: Introductionmentioning

confidence: 99%

Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications

You,

Nam,

et al. 2024

IEEE Access

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This study investigated a novel forward body bias (FBB) analysis to optimize the threshold voltage (Vth) at cryogenic temperatures in the latest dynamic random-access memory (DRAM). Electrical measurements were conducted to analyze the cryogenic body bias effect in terms of performance, reliability, and short-channel effect in two types of transistors: DRAM peripheral low Vth transistors (Peri LVT) and buried-channel-array transistors (BCAT). At 77 K, the Vth shift (ΔVth) in BCAT was larger than that in Peri LVT due to the difference in channel doping concentration. It was observed that only BCAT experienced a decrease in saturation drain current (Id.sat) at cryogenic temperature because of the large ΔVth. To compensate for the ΔVth, FBB was applied to transistors. As a result, FBB effectively controlled the Vth and improved carrier mobility. Furthermore, this study demonstrated that FBB reduced hot-carrier degradation (HCD) at cryogenic temperature and improved short-channel effect, such as drain-induced barrier lowering (DIBL). These findings offer valuable solutions for optimizing cryogenic memory operation in quantum computing applications.INDEX TERMS Buried-channel-array transistor (BCAT), cryogenic, drain-induced barrier lowering (DIBL), forward body bias, hot-carrier degradation, threshold voltage.

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Section: Introductionmentioning

confidence: 99%

Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications

You,

Nam,

et al. 2024

IEEE Access

Self Cite

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Cryogenic-Aware Forward Body Biasing in Bulk CMOS

Overwater,

Babaie,

Sebastiano

2024

IEEE Electron Device Lett.

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Cryogenic CMOS (cryo-CMOS) circuits are often hindered by the cryogenic threshold-voltage increase. To mitigate such an increase, a forward body biasing (FBB) technique in bulk CMOS is proposed, which can operate up to the nominal supply without problematic leakage currents, thanks to the larger diode turn-on voltage at cryogenic temperatures. As a result, traditional circuits, such as pass-gates, can operate down to 4.2 K, and their performance is augmented, e.g., digital circuits speeding up by 1.62× or lowering their energy per transition and energydelay product by 4.24× and 2.33×, respectively. Unlike back biasing in FD-SOI, here all FBB voltages remain within the supplies, hence enabling on-chip and device-specific biasing. The proposed FBB technique thus represents a valuable design tool for bulk cryo-CMOS circuits.

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Forward Body Bias Technique in DRAM Peripheral Transistor at Cryogenic Temperature for Quantum Computing Applications

Cited by 2 publications

References 10 publications

Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications

Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications

Cryogenic-Aware Forward Body Biasing in Bulk CMOS

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