Formal verification of a PowerPC microprocessor

Abstract

This paper presents the use of formal methods in the design of a PowerPC microprocessor. The chosen methodology employs two independently developed design views, a register-transfer level specification for efficient system simulation and a transistorlevel implementation geared toward maximal processor performance. A BDD-based verification tool is used to functionally compare the two views which essentially validates the transistor-level implementation with respect to any functional simulation/verification performed at the register-transfer level. We show that a tight integration of the verification approach into the overall design methodology allows the formal verification of complex microprocessor implementations without compromising the design process or performance of the resulting system.

Tamper Evident Microprocessors

“…Microprocessor design is a highly cooperative and structured activity with tens to hundreds of participants [14]. The latest Intel Atom Processor, for instance, is reported to have had 205 "Functional Unit Blocks" [3]; a design of a recent System-on-Chip product from ST Microelectronics is reported to have required over 200 engineers hierarchically organized into eight units [1].…”

Optimizing designs containing black boxes

“…Traditionally, designs with black boxes have been synthesized by making the inputs to the black boxes primary outputs, and output of the black boxes primary inputs, and synthesizing the simple logic [5,1].…”

Formal methods

“…The Verity verification tool [Kuehlmann et al 1995 Moore 1995] and checked it with the ACL2 mechanical theorem prover. Gaps and mistakes were found in the informal "proof" but in the end the microcode was mechanically shown to be correct .…”