Flow Boiling of R134a in a Multi-Microchannel Heat Sink With Hotspot Heaters for Energy-Efficient Microelectronic CPU Cooling Applications

Madhour, Yassir; Olivier, Jonathan; Costa-Patry, Etienne; Paredes, Stephan; Michel, Bruno; Thome, John R.

doi:10.1109/tcpmt.2011.2123895

Cited by 70 publications

(24 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Most of the TSVs were found to have a lower than 2[Ω] resistance, with an averaged value of 0. 7[Ω] for all measured samples. The cross section of the fabricated TSV is presented on the left side of Fig.…”

Section: Intra-chip Stack Thermal Managementmentioning

confidence: 99%

“…Indeed, the reliability, performance, and power dissipation of interconnects and transistors are heavily dependent on their operating temperature. Therefore, backside microchannel fluidic cooling concepts, be it single-phase water or two-phase dielectric evaporative cooling using environmentally-friendly refrigerants, were introduced into high-end server products [5][6][7][8].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Integration of intra chip stack fluidic cooling using thin-layer solder bonding

Madhour

Zervas

Schlottig

et al. 2013

2013 IEEE International 3D Systems Integration Conference (3DIC)

Self Cite

View full text Add to dashboard Cite

Abstract-Three-dimensional (3D) stacking of integratedcircuit (IC) dies by vertical integration increases system density and package functionality. The vertical integration of IC dies by area-array Through-Silicon-Vias (TSVs) reduces the length of global interconnects and accordingly the signal delay time. On the other hand, the ongoing miniaturization trend of ICs results in constantly increasing chip-level power densities. Thus, the development of new chip cooling concepts is of utmost importance. Therefore, scalable cooling solutions for chip stacks, such as interlayer cooling, need to be investigated. This paper presents a new concept for the integration of intra chip stack fluidic cooling, namely die-embedded microchannels for single-and twophase thermal management, using a patterned thin-layer eutectic solder bonding technique for the stack assembly. Results showed the successful fabrication of 5-layer chip stacks with embedded microchannels and high aspect ratio TSVs. Optical inspections demonstrated the proper bond line formation and direct current (DC) daisy-chain electrical tests indicated the successful combination of TSVs with thin-layer solder interconnects. Mechanical shear tests on die-on-die bonded samples showed the strength of the patterned thin-layer solder bond (16MPa). An added solder ring-pad component to seal the electrically active pad from any conductive liquid coolant was also investigated and reflow tests on such geometries showed the appearance of a balling effect along the solder ring line. This balling was found to be mitigated when the ring aspect ratio (deposited solder height to ring width ratio) was kept below the experimentally observed critical value of 0.65.

show abstract

Section: Intra-chip Stack Thermal Managementmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Integration of intra chip stack fluidic cooling using thin-layer solder bonding

Madhour

Zervas

Schlottig

et al. 2013

2013 IEEE International 3D Systems Integration Conference (3DIC)

Self Cite

View full text Add to dashboard Cite

show abstract

“…Subcooled flow boiling is expected to realize the high heat flux cooling for electronic devices [6,7], or for high heat flux cooling in microgravity [8]. Subcooled flow boiling also plays a significant role in case of cooling of plasma facing component of thermonuclear reactors.…”

Section: Introductionmentioning

confidence: 99%

CFD Simulation of Upward Subcooled Boiling Flow of Freon R12

Romsy

Zácha

2016

APP

View full text Add to dashboard Cite

Abstract. Subcooled flow boiling under forced convection occurs in many industrial applications to maximize heat removal from the heat source by the very high heat transfer coefficient. This work deals with CFD simulations of the subcooled flow boiling of refrigerant R12 solved by code ANSYS FLUENT r16. The main objective of this paper is verification of used numerical settings on relevant experiments performed at DEBORA test facility. Also comparisons with previously provided simulation on NRI Rez are presented. Data outputs from this work are basis to subsequent calculations of steam-water mixture cooling of Pb-Li eutectic.

show abstract

“…Heat fluxes of 1000 W/cm 2 have been reached using refrigerants [24], although this was under subcooled boiling with mass fluxes and pressure drops being an order of magnitude higher than microchannel two-phase boiling. It was further shown that heat fluxes of 180 W/cm 2 can be removed with a saturation temperature as high as 60 C, while maintaining the chip temperature below 85 C [27]. A refrigerant has the advantage of being a dielectric fluid with a long successful history in industrial applications, is inert to most engineering materials, readily available and relatively inexpensive.…”

Section: Introductionmentioning

confidence: 99%

“…Currently, heat is being ejected into the atmosphere at temperatures of about 40 C when using traditional air cooling methods. This is because chip temperatures are being cooled at 15e20 C. Due to the effective cooling of chips when using on-chip cooling, fluid approach temperatures of about 60 C can be realized, while removing high heat fluxes and keeping chip temperatures below 85 C [27]. Although the temperature, and hence the quality of the heat is higher, the applications for using this heat are still limited.…”

Section: Introductionmentioning

confidence: 99%

On-chip two-phase cooling of datacenters: Cooling system and energy recovery evaluation

Marcinichen

Olivier

Thome

2012

Applied Thermal Engineering

Self Cite

131

View full text Add to dashboard Cite

a b s t r a c tCooling of datacenters is estimated to have an annual electricity cost of 1.4 billion dollars in the United States and 3.6 billion dollars worldwide. Currently, refrigerated air is the most widely used means of cooling datacenter's servers, which typically represents 40e45% of the total energy consumed in a datacenter. Based on the above issues, thermal designers of datacenters and server manufacturers now seem to agree that there is an immediate need to improve the server cooling process. The goal of the present study is to propose and simulate the performance of a novel hybrid two-phase cooling cycle with micro-evaporator elements (multi-microchannel evaporators) for direct cooling of the chips and auxiliary electronics on blade server boards (savings in energy consumption of over 60% are expected). Different working fluids were considered, namely water, HFC134a and a new, more environmentally friendly, refrigerant HFO1234ze. The results so far demonstrated that the pumping power consumption is on the order of 5 times higher for the water-cooled cycle. Additionally, a case study considering the hybrid cooling cycle applied on a datacenter and exploring the application of energy recovered in the condenser on a feedwater heater of a coal power plant was also investigated (modern datacenters require the dissipation of 5e15 MW of heat). Aspects such as minimization of energy consumption and CO 2 footprint and maximization of energy recovery (exergetic efficiency) and power plant efficiency are investigated.

show abstract

Flow Boiling of R134a in a Multi-Microchannel Heat Sink With Hotspot Heaters for Energy-Efficient Microelectronic CPU Cooling Applications

Cited by 70 publications

References 14 publications

Integration of intra chip stack fluidic cooling using thin-layer solder bonding

Integration of intra chip stack fluidic cooling using thin-layer solder bonding

CFD Simulation of Upward Subcooled Boiling Flow of Freon R12

On-chip two-phase cooling of datacenters: Cooling system and energy recovery evaluation

Contact Info

Product

Resources

About