Flextended Tiles

Abstract

Loop tiling to exploit data locality and parallelism plays an essential role in a variety of general-purpose and domain-specific compilers. Affine transformations in polyhedral frameworks implement classical forms of rectangular and parallelogram tiling, but these lead to pipelined start with rather inefficient wavefront parallelism. Multiple extensions to polyhedral compilers evaluated sophisticated shapes such as trapezoid or diamond tiles, enabling concurrent start along the axes of the iteration space; yet these resort to custom schedulers and code generators insufficiently integrated within the general framework. One of these modified shapes referred to as overlapped tiling also lacks a unifying framework to reason about its composition with affine transformations; this prevents its application in general-purpose loop-nest optimizers and the fair comparison with other techniques. We revisit overlapped tiling, recasting it as an affine transformation on schedule trees composable with any affine scheduling algorithm. We demonstrate how to derive tighter tile shapes with less redundant computations. Our method models the traditional "scalene trapezoid" shapes and novel "right-rectangle" variants. It goes beyond the state of the art by avoiding the restriction to a domain-specific language or introducing post-pass rescheduling and custom code generation. We conduct experiments on the PolyMage benchmarks and iterated stencils, validating the effectiveness and applicability of our technique on both general-purpose multicores and GPU accelerators. CCS Concepts: • Software and its engineering → Compilers;

SlidingConv: Domain-Specific Description of Sliding Discrete Cosine Transform Convolution for Halide

“…Additional pre/post-processing is limited to point (pixel-wise) operators. Polyhedral optimization must be considered [38], [39] for extending to stencil or areawise operations.…”

Tile size selection of affine programs for GPGPUs using polyhedral cross-compilation

“…In the case of iterative stencils we use the problem size of the outermost space dimension. As an illustration, given a problem size of 1024 and a 2D dominating array, the upper bound produced would be loд 1.15 (64).…”

“…Other works such as Flextended Tiles [64] improve on the traditional overlapped tiles [37] with the goal of reducing redundant computations. Previously, split tiling [20] and hexagonal tiling [19] were also used in multiple automated code generators, in particular, for iterative stencil computations, to enhance the parallelism.…”