Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads

Thid, Rikard; Sander, Ingo; Jantsch, Axel

doi:10.1109/dsd.2006.52

Cited by 18 publications

(12 citation statements)

References 13 publications

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“…The b-model [18] provides a simple method to produce and analyze the burstiness of self-similar traffic with a single value. The b-model has been adapted to study burstiness effects in the Nostrum NoC [19]. Evidence of traffic self-similarity and burstiness in MPEG-2 video applications has been shown [20].…”

Section: Related Workmentioning

confidence: 99%

Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs

Gebhardt

You

Stevens

2010

2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip

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Abstract-Power consumption of on-chip interconnects is a primary concern for many embedded system-on-chip (SoC) applications. In this paper, we compare energy and performance characteristics of asynchronous (clockless) and synchronous networkon-chip implementations, optimized for a number of SoC designs. We adapted the COSI-2.0 framework with ORION 2.0 router and wire models for synchronous network generation. Our own tool, ANetGen, specifies the asynchronous network by determining the topology with simulated-annealing and router locations with force-directed placement. It uses energy and delay models from our 65 nm bundled-data router design. SystemC simulations varied traffic burstiness using the self-similar b-model. Results show that the asynchronous network provided lower median and maximum message latency, especially under bursty traffic, and used far less router energy with a slight overhead for the interrouter wires.

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Section: Related Workmentioning

confidence: 99%

Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs

Gebhardt

You

Stevens

2010

2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip

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“…However, none of these works proposes a fitting procedure to determine the adequate statistical models that should be used to simulate a given traffic. Thid et al use self-similar traffic for on-chip prototyping in a recent work [29]. The work of Varatkar and Marculescu about long-range dependence in on-chip traffic is referenced in Section 2.2.…”

Section: Related Workmentioning

confidence: 99%

Long-range dependence and on-chip processor traffic

Scherrer

Fraboulet

Risset

2009

Microprocessors and Microsystems

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Long-range dependence is a property of stochastic processes that has an important impact on network performance, especially on the buffer usage in routers. We analyze the presence of long-range dependence in on-chip processor traffic and we study the impact of long-range dependence on networks-on-chip. We propose to investigate the presence of long-range dependence in communication traces of processor ips at the cycle-accurate level. We also study the impact of long-range dependence on a real network-on-chip using the SocLib simulation environment and traffic generators of our own. Our experiments show that long-range dependence is not an ubiquitous property of on-chip processor traffic and that its impact on the network-on-chip is highly correlated with the low level communication protocol used.

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“…This is in contrast with other bursty generators, which tend to be complex, or rely on the non-self-similar Poisson distribution. The b-model has been adapted to study burstiness effects in the Nostrum NoC [26]. Evidence of traffic self-similarity and burstiness in MPEG-2 video applications has been shown [4], [5].…”

Section: Related Workmentioning

confidence: 99%

Design of an Energy-Efficient Asynchronous NoC and Its Optimization Tools for Heterogeneous SoCs

Gebhardt

You

Stevens

2011

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-The energy usage of on-chip interconnects is a concern for many system-on-chips targeting portable batterypowered devices. We have designed and evaluated a network-onchip (NoC) for such an application, including tools to optimize for power and communication latency. Our asynchronous (clockless) network operates with efficient two-phase bundled-data links and four-phase routers. The topology and router floorplan is determined by our tool, ANetGen, which optimizes the network for energy and latency using simulated annealing and forcedirected placement methods. We compare our solutions against a traditional synchronous NoC as specified by the COSI-2.0 framework and ORION 2.0 router and wire energy models. Traffic is simulated with SystemC functional models, and messages are generated with a "bursty" self-similar b-model. Results indicate our asynchronous network was more energy-efficient, lower in area, and provided comparable or superior message latency.

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Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads

Cited by 18 publications

References 13 publications

Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs

Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs

Long-range dependence and on-chip processor traffic

Design of an Energy-Efficient Asynchronous NoC and Its Optimization Tools for Heterogeneous SoCs

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