Fitting Position Data to Minimize Velocity Errors

Stoller, David S.

doi:10.1137/1002007

Cited by 1 publication

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“…Anisotropic etching.--Anisotropic etching of (100) oriented silicon wafers followed by thermal oxidation has been proposed (11) as a method to fabricate densely packed and dielectrically isolated silicon integrated circuits. The characteristic feature of anisotropic etchants such as KOH and other strongly alkaline solutions (12)(13)(14)(15)(16)(17)(18)(19)(20) is that the etch rate varies widely depending on the crystallographic orientation of the silicon substrate. For the three low index crystal planes of silicon, the etch rate decreases in the order (100), (110), and (111).…”

Section: Methodsmentioning

confidence: 99%

Topology of Silicon Structures with Recessed SiO2

Bassous

Maniscalco

1976

J. Electrochem. Soc.

109

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The performance and packing density of silicon integrated circuits can be increased by the use of thermally grown silicon dioxide for the dielectric isolation of the active components of the circuit and by employing fabrication procedures which yield devices with flat surfaces. Using Si3N4 masking, anisotropic etching of the silicon substrate, and thermal oxidation, structures were fabricated in which the SiO2 was recessed below the original surface. Because of the lateral oxidation under the edge of the Si3N4 mask, a so‐called bird's beak shaped structure is formed at the normalSi‐SiO2 and SiO2‐Si3N4 interfaces. Factors which influence the surface planarity due to the bird's beak formation have been studied experimentally. This investigation studies the minimization of the bird's beak by using a combination of a thick Si3N4 film, a thin SiO2 pad, and a suitable thickness of recessed oxide (ROX). Uniform anisotropic etching and parallel alignment to <110> are also required to maintain dimensional control.

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