First look at the beam test results of the FPIX2 readout chip for the BTeV silicon pixel detector

Abstract

High energy and nuclear physics experiments need tracking devices with excellent spatial precision and readout speed in the face of ever-higher track densities and increased radiation environments. The new generation of hybrid pixel detectors (arrays of silicon diodes bump bonded to arrays of front-end electronic cells) is a technology able to meet these challenges. We report the first results of the BTeV silicon pixel detector beam test carried out at Fermilab in summer 2004. Tests were performed using a 120 GeV/c proton beam incident on a 6 planes pixel detector telescope. The last prototype developed for the BTeV experiment (FPIX2) is tested in the middle of the telescope. There is no external trigger and events were built using the time-stamp information provided by the readout chips.

Performance of a gas radiator ring imaging Cherenkov detector using multi-anode photomultiplier tubes

“…The front end electronics used in the test beam is based on custom made VA MAPMT ASICs produced at IDE AS, Norway. 2 Multiplexer boards (MUX), designed and developed at Syracuse, provide the interface with a PCI based data acquisition system designed and produced at Fermilab [7]. A system diagram describing one of the readout chains is shown in Fig.…”

“…The mating board (PMC) contains a large FPGA (Xilinx Virtex PRO) that permits customization of the DAQ. We used the general PTA firmware developed for the BTeV pixel test beam [7], but wrote the PMC firmware suitable for our data architecture.…”