First experimental demonstration of SiC super-junction (SJ) structure by multi-epitaxial growth method

Kosugi, Ryoji; Sakuma, Yuuki; Kojima, Kazutoshi; Itoh, Sachiko; Nagata, Akiyo; Yatsuo, Tsutomu; Tanaka, Yasunori; Okumura, Hajime

doi:10.1109/ispsd.2014.6856047

Cited by 65 publications

(32 citation statements)

References 6 publications

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“…DT SiC MOSFET (3rd Gen SiC MOSFET) has been commercialised by ROHM semiconductors for improved reliability and ruggedness with low

R_{on, sp}

[21]. Ion implantation and multiple epitaxial growths need to be performed on the

N^{+}

substrate for the desired growth of P and N pillar thickness [22, 23]. In [23], a superjunction MOSFET is practically realised using the multi‐epitaxial growth method.…”

Section: Device Structure and Simulation Resultsmentioning

confidence: 99%

“…Ion implantation and multiple epitaxial growths need to be performed on the

N^{+}

substrate for the desired growth of P and N pillar thickness [22, 23]. In [23], a superjunction MOSFET is practically realised using the multi‐epitaxial growth method. In addition, the switching performance of the device is characterised, and no degradation in turn ON/OFF with Schottky barrier diode is observed due to superjunction.…”

Section: Device Structure and Simulation Resultsmentioning

confidence: 99%

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Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode

Kotamraju

Vudumula

2020

IET Circuits, Devices & Systems

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“…DT SiC MOSFET (3rd Gen SiC MOSFET) has been commercialised by ROHM semiconductors for improved reliability and ruggedness with low

R_{on, sp}

[21]. Ion implantation and multiple epitaxial growths need to be performed on the

N^{+}

substrate for the desired growth of P and N pillar thickness [22, 23]. In [23], a superjunction MOSFET is practically realised using the multi‐epitaxial growth method.…”

Section: Device Structure and Simulation Resultsmentioning

confidence: 99%

“…Ion implantation and multiple epitaxial growths need to be performed on the

N^{+}

Section: Device Structure and Simulation Resultsmentioning

confidence: 99%

Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode

Kotamraju

Vudumula

2020

IET Circuits, Devices & Systems

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“…However, the fabrication of SiC and GaN SJ structures remains challenging. Vertical SiC SJ diodes were first demonstrated in 2014 [4], and 1.2 kV SiC SJ MOSFETs were recently announced [5]- [6]. Up to now, no experimental demonstration of vertical SJ devices has been reported in GaN, due to the challenges in forming multiple n-/p-pillars with precisely controlled doping and charges.…”

Section: Introductionmentioning

confidence: 99%

Superjunction Power Transistors With Interface Charges: A Case Study for GaN

Xiao

Zhang

et al. 2020

IEEE J. Electron Devices Soc.

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Recent progress in p-GaN trench-filling epitaxy has shown promise for the demonstration of GaN superjunction (SJ) devices. However, the presence of n-type interface charges at the regrowth interfaces has been widely observed. These interface charges pose great challenges to the design and performance evaluation of SJ devices. This work presents an analytical model for SJ devices with interface charges for the first time. In our model, two approaches are proposed to compensate interface charges, by the modulation of the SJ doping or the SJ geometry. Based on our model, an analytical study is conducted for GaN SJ transistors, revealing the design windows and optimal values of doping concentration and pillar width as a function of interface charge density. Finally, TCAD simulation is performed for vertical GaN SJ transistors, which validated our analytical model. Our results show that, with optimal designs, interface charges would only induce small degradation in the performance of GaN SJ devices. However, with the increased interface charge density, the design windows for pillar width and doping concentration become increasingly narrow and the upper limit in the pillar width window reduces quickly. When the interface charge density exceeds ∼3×10 12 cm −2 , the design window of pillar width completely falls into the sub-micron range, indicating significant difficulties in fabrication. Vertical GaN SJ transistors with interface charges retain great advantages over conventional GaN power transistors, but have narrower design windows and require different design rules compared to ideal GaN SJ devices.

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“…Superjunction (SJ) devices, in which alternating p-and n-type columns are located in a drift layer [1], [2], have been developed to improve the tradeoff relationship between breakdown voltage (BV) and specific on-resistance in unipolar devices. In the case of 4H-SiC SJ devices, ion implantation has been used to demonstrate BV of 0.8 to 2.4 kV [3]- [9]; however, chemical-vapor-deposition (CVD) trench filling, whose growth window was empirically obtained [10], should become the key technique for higher-BV 4H-SiC SJ devices. Although development time for such trench-filling SJ devices is expected to be reduced by using technology computer-aided design (TCAD), topography simulation [11], [12], a part of TCAD, has not been widely used due to its inability to simulate a distribution of acceptor concentration (N A ) in filled trenches.…”

Section: Introductionmentioning

confidence: 99%

Modeling of Al Doping During 4H-SiC Chemical-Vapor-Deposition Trench Filling

Mochizuki

Kosugi

Yonezawa

et al. 2019

IEEE J. Electron Devices Soc.

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Aluminum doping during 4H-SiC chemical-vapor-deposition (CVD) trench filling was numerically modeled toward precise design of high-voltage superjunction devices. As a first-order approximation, growth-rate-and surface-normal-scaling functions were determined based on the reported experimental results. Simulated isoconcentration contours of aluminum were confirmed to qualitatively agree with the reported imaging of doping in SiC by scanning spreading resistance microscopy. Improvement of the proposed models based on additional experiments should contribute to reducing the development time for 4H-SiC superjunction devices fabricated using CVD trench filling. INDEX TERMS Aluminum, power semiconductor devices, silicon compounds, simulation.

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First experimental demonstration of SiC super-junction (SJ) structure by multi-epitaxial growth method

Cited by 65 publications

References 6 publications

Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode

Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode

Superjunction Power Transistors With Interface Charges: A Case Study for GaN

Modeling of Al Doping During 4H-SiC Chemical-Vapor-Deposition Trench Filling

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