Fine grinding of silicon wafers: designed experiments

Pei, Zhi; Strasbaugh, Alan

doi:10.1016/s0890-6955(01)00123-7

Cited by 74 publications

(30 citation statements)

References 2 publications

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“…R max of less than 2 nm has been reported [9,11,13]. Note that typical surface roughness obtained with conventional wafer grinding using #2000 resin-bond wheels was 10 nm in R a [3].…”

Section: Surface Roughnessmentioning

confidence: 94%

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ELID grinding of silicon wafers: A literature review

Liu

Pei

Fisher

2007

International Journal of Machine Tools and Manufacture

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Silicon wafers are the most widely used substrates for fabricating integrated circuits. There have been continuous demands for higher quality silicon wafers with lower prices, and it becomes more and more difficult to meet these demands using current manufacturing processes. In recent years, research has been done on electrolytic in-process dressing (ELID) grinding of silicon wafers to explore its potential to become a viable manufacturing process. This paper reviews the literature on ELID grinding, covering its set-ups, wheel dressing mechanism, and experimental results. It also discusses the technical barriers that have to be overcome before ELID grinding can be used in manufacturing.

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“…R max of less than 2 nm has been reported [9,11,13]. Note that typical surface roughness obtained with conventional wafer grinding using #2000 resin-bond wheels was 10 nm in R a [3].…”

Section: Surface Roughnessmentioning

confidence: 94%

“…As shown in Fig. 1, the major manufacturing processes for silicon wafers include crystal growth, slicing, flattening (grinding or lapping), etching, and polishing [3]. More information on these processes can be found elsewhere [4][5][6][7].…”

Section: Introductionmentioning

confidence: 99%

ELID grinding of silicon wafers: A literature review

Liu

Pei

Fisher

2007

International Journal of Machine Tools and Manufacture

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“…One technique to improve the flatness of single-side polished wafers is fine grinding of front sides of etched wafers prior to polishing [20,43,69,98]. The purpose of etched-wafer fine grinding is to improve the flatness of feedstock wafers to polishing and to reduce the material removed during polishing thereby achieving a higher throughput for polishing and better flatness for polished wafers.…”

Section: Interrelationship Between Grinding and Polishingmentioning

confidence: 99%

“…If wafers are small, grinding wheels will also be small, making it very difficult to realize cost-effective grinding operation. This is because, generally speaking, a grinding wheel needs to be operated at a sufficiently high speed (surface speed at the wheel segments) when grinding silicon wafers [43,69,70]. When a grinding wheel has a sufficiently large diameter, it is easy to achieve the high surface speed required.…”

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confidence: 99%

Grinding of silicon wafers: A review from historical perspectives

Pei

Fisher

Liu

2008

International Journal of Machine Tools and Manufacture

151

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The majority of semiconductor devices are built on silicon wafers. Manufacturing of high quality silicon wafers involves several machining processes including grinding. This review paper discusses historical perspectives on grinding of silicon wafers, impacts of wafer size progression on applications of grinding in silicon wafer manufacturing, and interrelationships between grinding and two other silicon machining processes (slicing and polishing). It is intended to help * Corresponding author. Tel.: +1 785 532 3436; fax: +1 785 532 3738. E-mail address: zpei@ksu.edu (Z.J. Pei). 1 readers to gain a more comprehensive view on grinding of silicon wafers, and to be instrumental for research and development in grinding of wafers made from other materials (such as gallium arsenide, germanium, lithium niobate, sapphire, and silicon carbide).

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“…However, most recycling processes involve etching, polishing, and cleaning to remove some of the silicon surface. An alternative approach to this Chemical & Mechanical Planarization (CMP) method, that achieves faster and cheaper wafer recycling, is the etching of the recycled wafers with hydrofluoric acid (HF) solution (Xiao 2001;Pei and Strasbaugh 2002).…”

Section: Introductionmentioning

confidence: 99%

A synchronous microsystem process using a dual-cylinder tool for the surface microstructures from solar cell silicon wafers

2011

Microsyst Technol

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The low yield of active epoxy and Si 3 N 4 microstructure layers is an important factor in semiconductor production. This study investigates a synchronous removal process using a newly designed dual-cylinder micro electromachining (l-ECM) tool. This method of removing defective layers from solar cell silicon wafers can replace the current ones that employ strong acid and mechanical grinding. Grinding can damage the physical structure of silicon wafers and acid treatment is a source of environmental pollution. A high rate of epoxy film removal can be achieved with a short dual-cylinder anode used with a small gap between the tool and the silicon wafer surface. A thin anode also corresponds to a higher rate of epoxy film removal. Small diameter cathode cylinders also provide more discharge space and with a higher current give a better removal effect. The precise engineering technology used in this approach provides a clean and efficient recycling process that removes surface microstructure from defective solar cell silicon wafers to put them back into production with a resulting reduction of cost and environmental pollution.

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Fine grinding of silicon wafers: designed experiments

Cited by 74 publications

References 2 publications

ELID grinding of silicon wafers: A literature review

ELID grinding of silicon wafers: A literature review

Grinding of silicon wafers: A review from historical perspectives

A synchronous microsystem process using a dual-cylinder tool for the surface microstructures from solar cell silicon wafers

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