2021
DOI: 10.1109/tie.2020.2979557
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Field-Programmable System-on-Chip-Based Control System for Real-Time Distortion Correction in Optical Imaging

Abstract: The digital transition requires real-time control of complex systems with short loop time and low latency in various applications. Field-programmable gate arrays (FP-GAs) are, in principle, capable of complying with this task but demand, on the other hand, a high programming effort. In this article, we propose a field-programmable system on chip (FPSoC) as a hybrid solution of an FPGA and a central processing unit (CPU) on a single monolithic die to combine the strengths of both architectures. An FPSoC-based a… Show more

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Cited by 19 publications
(7 citation statements)
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“…Because the surface of the droplet can oscillate with several hundred Hertz, the digital controller must have a high control cycle rate. Therefore, the signal processing of the wavefront sensor as well as the control algorithm for the deformable mirror are implemented on an in-house developed electronic platform, that is based on a FPSoC chip (Zynq-7100) [15]. This way, 2100 to 3600 control cycles per second can be achieved (depending on algorithm parameters).…”
Section: Methodsmentioning
confidence: 99%
“…Because the surface of the droplet can oscillate with several hundred Hertz, the digital controller must have a high control cycle rate. Therefore, the signal processing of the wavefront sensor as well as the control algorithm for the deformable mirror are implemented on an in-house developed electronic platform, that is based on a FPSoC chip (Zynq-7100) [15]. This way, 2100 to 3600 control cycles per second can be achieved (depending on algorithm parameters).…”
Section: Methodsmentioning
confidence: 99%
“…In the case of FPGAs, they offer very good performance for executing deterministic tasks, but its programming is not as easy as with microcontrollers, and they require to power the used logic continuously. There are also hybrid solutions that combine the benefits of FPGAs and CPUs, known as Field-Programmable Systems-on-Chips (FPSoCs) [45]. In the case of CPLDs, they can execute tasks faster than FPGAs, but their maximum allowed design complexity is inferior to the one offered by FPGAs.…”
Section: Hardware Of the Control And Power Subsystemsmentioning
confidence: 99%
“…It should be remembered, that the DenseNet has been trained only with synthetic data and works in an experimental environment successfully. The predicted mode weights can be further used for a robust control [38], which is commonly performed in imaging applications based on a field programmable gate array [10], [39].…”
Section: Experimental Investigationsmentioning
confidence: 99%