Fault-Tolerant in Embedded Systems (MPSoC): Performance Estimation and Dynamic Migration Task

Smiri, Kamel; Smei, Habib; Fourati, Nourhen; Jemai, Abderrazak

doi:10.25046/aj0203150

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Profiling Of Test Model Hevc Decoder1

Pipeline Execution Approach1

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2017

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Cited by 1 publication

(2 citation statements)

References 9 publications

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“…Several works dealing with performance estimation of embedded systems have been realized [22]. In the case of the HEVC codec, performance estimation aims to test the ability of codecs to process video for real-time applications and to support new resolutions (HD, UHD, Full HD, 4k, 8k) and to measure footprint and the space occupied by the hardware components that make up the device.…”

Section: Profiling Of Test Model Hevc Decodermentioning

confidence: 99%

See 1 more Smart Citation

A New profiling and pipelining approach for HEVC Decoder on ZedBoard Platform

Smei¹,

Smiri²,

Jemai³

2017

Adv. sci. technol. eng. syst. j.

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Section: Profiling Of Test Model Hevc Decodermentioning

confidence: 99%

“…Stage 3: Filtering, which corresponds to transitions (15,16,17,18,19,20,21,22,23,24,25,26). This stage corresponds to the Loop Filter process A parametric analysis of the application has enabled to deduce that the overall execution time of Stages 0, 1 and 3 is approximately equivalent to the execution time of Stage 2.…”

Section: Pipeline Execution Approachmentioning

confidence: 99%