Fault tolerant error coding and detection using reversible gates

James, Rekha K.; Shahana, T. K.; Jacob, K. Poulose; Sasi, Sreela

doi:10.1109/tencon.2007.4428776

Cited by 18 publications

(5 citation statements)

References 12 publications

(5 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Beyond Shor's and Grover's algorithms, CNOT gates are integral in various quantum algorithms, including quantum simulations, optimization problems, and quantum machine learning. CNOT gates are used in reversible logic synthesis, random number generation circuits, designing reversible circuits, and creating reversible arithmetic and data processing circuits [76,82].…”

Section: Applications Of Reversible Logic Gatesmentioning

confidence: 99%

Reversible Logic Gates and Applications – A Low Power Solution to VLSI Chips

Tiwari,

Kadam,

Dudhedia

et al. 2024

MMEP

View full text Add to dashboard Cite

In recent years, reversible logic gates have garnered significant interest because of their potential to decrease energy consumption and meet the growing need for low-power computing systems. Unlike conventional logic gates, reversible logic gates ensure that no information loss happens during computation, allowing for the reversal of the entire computation process. This unique characteristic opens up new avenues for developing energy-efficient digital circuits. This review paper serves as a vital contribution to the field by addressing a noticeable gap in the existing literature regarding reversible logic gates. The study not only comprehensively analyzes the array of reversible logic gates available but also underscores their practical applications and significance. It encompasses a wide variety of reversible logic gates, including Toffoli gates, Fredkin gates, and newer innovations. It is found that Toffoli gates outperformed in terms of gate count and quantum cost reduction, making them a preferred choice for quantum circuit optimization. Additionally, Fredkin gates showed exceptional performance in specific applications, like data swapping and quantum state control. The digital circuits like adders, multiplexers, ALU etc. are successfully designed using reversible gates like HNG, DKG etc. The significant gap this study fills lies in the need for a consolidated and in-depth analysis of the state-of-the-art reversible logic gates and their real-world utility. While prior research has discussed these gates individually, this paper takes a novel approach by offering a holistic assessment of their performance, quantum cost, gate count, and practical applications, thereby presenting a comprehensive resource for researchers, engineers, and designers in the field. This innovative contribution plays a pivotal role in shaping the progress of energy-efficient and quantum computing systems as well as in optimizing VLSI chip designs for various applications, with a particular emphasis on enhancing cryptographic and data processing capabilities. The findings of this review aim to stimulate further research and development in reversible computing, contributing to the advancement of energy-efficient and information-preserving computing systems.

show abstract

Section: Applications Of Reversible Logic Gatesmentioning

confidence: 99%

Reversible Logic Gates and Applications – A Low Power Solution to VLSI Chips

Tiwari,

Kadam,

Dudhedia

et al. 2024

MMEP

View full text Add to dashboard Cite

show abstract

“…Parhami demonstrated the feasibility of the parity preserving design adding parity protection to Toffoli gates and designing a full adder [19]. Others have taken this idea even further by also implementing simple circuits that support error correction with hamming codes [11]. Another error detection method reported in the literature consisted on self checking reversible gate pairs [25].…”

Section: Related Workmentioning

confidence: 99%

Decting Errors in Reversible Circuits With Invariant Relationships

Alves

2008

Preprint

View full text Add to dashboard Cite

show abstract

“…If the parity of the input data can be conserved during the course of the computation then the intermediate checking would not be required. Thus, Reversible fault tolerant logic circuits preserve input bits and also facilitate the detection and correction of bit errors that produced by itself [8].…”

Section: Introductionmentioning

confidence: 99%

Cost Efficient Fault Tolerant Decoder in Reversible Logic Synthesis

Rahman¹

2014

IJCA

View full text Add to dashboard Cite

Fault Tolerant reversible decoders are the prerequisite of high performance computing systems. In this paper, an optimized reversible fault tolerant decoder has been proposed by using novel cost effective gates named Reversible Fault Tolerant Decoder (RDC) and Double Fredkin Gate (DFG). Several lower bounds on the numbers of gates, garbage and quantum costs are also proposed to generalize the architecture of n-to-2 n reversible decoder. The comparative performance analysis shows that the proposed design outperforms the existing designs in terms of number of gates used, quantum cost, delay, ancilla inputs and design complexity.

show abstract

Fault tolerant error coding and detection using reversible gates

Cited by 18 publications

References 12 publications

Reversible Logic Gates and Applications – A Low Power Solution to VLSI Chips

Reversible Logic Gates and Applications – A Low Power Solution to VLSI Chips

Decting Errors in Reversible Circuits With Invariant Relationships

Cost Efficient Fault Tolerant Decoder in Reversible Logic Synthesis

Contact Info

Product

Resources

About