Fault tolerance in FFT arrays: Time redundancy approaches

Area-Efficient Error Detection Structure for Linear Feedback Shift Registers

“…Redundancy methods are simple and efficient error detection/correction design techniques and they can be traditionally categorized into hardware and time redundancy methods [28][29][30][31][32]. Hardware redundancy [28][29][30] can be accomplished by adding copies of the original design to protect the design against malicious faults.…”

“…In general, hardware redundancy [28][29][30] has only negligible effects on the overall system performance but incurs significant hardware overheads to maintain the desired level of reliability. Time redundancy [31,32] employs redundancy in terms of time instead of hardware and the same operation is executed multiple times with the same hardware resource. This approach detects or corrects faults by comparing all the results obtained at different times.…”

“…For instance, two-time-redundancy, which is similar to DMR, allows the failure detection in one of two execution times and three-timeredundancy, which is similar to TMR allows the correction of an incorrect output according to majority voting. Unlike hardware redundancy [28][29][30], time redundancy [31,32] involves an affordable hardware overhead but incurs a performance penalty. Examples of hardware [28][29][30] and time [31,32] redundancy methods to detect undesirable faults are shown in Figures 2 and 3, respectively.…”

“…Unlike hardware redundancy [28][29][30], time redundancy [31,32] involves an affordable hardware overhead but incurs a performance penalty. Examples of hardware [28][29][30] and time [31,32] redundancy methods to detect undesirable faults are shown in Figures 2 and 3, respectively. In both figures, the black line corresponds to the conventional LFSR [10][11][12][13][14][15][16][17][18][19][20][21] and the dashed blue line indicates the additional hardware overhead.…”

“…As far as we searched, there are seldom recent literatures that describe the error detection/correction designs for LFSR implementation. Traditional redundancy methods [28][29][30][31][32] can be applied to LFSRs to attain a highly reliable design by duplicating the original LFSR [10][11][12][13][14][15][16][17][18][19][20][21] in terms of time and hardware. However, the overheads from the duplication are inevitable and they become a serious burden when the length of the generator polynomial is large.…”