Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters

Abstract

Reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an Analog-to-Digital Converter (ADC) to convert the collected data to digital form and a digital unit to process it. Though considerable amount of research has been performed to increase the reliability of digital blocks, the same can not be claimed for mixed signal blocks. The reliability enhancement which we employ starts with fault sensitivity analysis followed by redesign. The data obtained from the sensitivity analysis is used to grade blocks based on their sensitivity to faults. The highly sensitive blocks can then be replaced by more reliable alternatives. The improvement gained by opting for more robust implementations might be limited due to the number of possible implementations. In these cases alternative reliability enhancement techniques such as adding redundancy may provide further improvements. The steps involved in the reliability enhancement of ADCs are illustrated in this paper by first proposing a sensitivity analysis methodology for α-particle induced transients and then suggesting redesign techniques to improve the reliability of the ADC. A novel concept of node weights specific to α-particle transients is introduced which improves the accuracy of the sensitivity analysis. The fault simulations show that, using techniques such as alternative robust implementations, adding redundancy, pattern detection and transistor sizing, considerable improvements in reliability can be attained.

Technology Mapping for Reliability Enhancement in Logic Synthesis

“…Table I compares the calculated values of the fault sensitivity for three circuits. Column 2 is the exhaustive transistor-level simulation method [3,4]. Column 3 is the result of the simulation based on eq(5).…”

“…Then the subject graph is converted to a DAG structure and the minimal Fault Sensitivity program is called. Finally, we use our simulation-based scripts [4] to verify the improvement of the metric. We ran this program on the circuits from the ISCAS85 benchmark suits.…”

“…As a result, leakage current is collected by the substrate. Transistor level fault simulation methods [4] are commonly used to analyze the efect of the particle hits. An input stimulus vector is related with primary input probability(p), charge injection volume(q), charge injection time(r), and injection node(N ) [4].…”

“…Transistor level fault simulation methods [4] are commonly used to analyze the efect of the particle hits. An input stimulus vector is related with primary input probability(p), charge injection volume(q), charge injection time(r), and injection node(N ) [4]. For each stimulus vector, a transient current source, denoted by I inj , is added at drain or source node in a transistor ( Fig.1(c)).…”

“…Simulation-based methods are generally used to calculate FS [4]. Alpha-particles and neutrons are the main sources for high energy particle hits.…”