Fast and accurate event-driven simulation of mixed-signal systems with data supplementation

Park, Myeong-Jae; Kim, Hanseok; Lee, Minbok; Kim, Jaeha

doi:10.1109/cicc.2011.6055330

Cited by 15 publications

(10 citation statements)

References 4 publications

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“…For this purpose, we have defined a composite signal type named XREAL for representing continuous-time analog waveforms as a set of parameters, {(a i ,b i ,m i )'s}. As noted earlier, the usage of composite data types to supplement auxiliary information to the signal value is similar to the work in [5], but this work proposes a single composite type for analog signals that can encompass all the different types discussed in [5].…”

Section: Implementation In Systemverilogmentioning

confidence: 97%

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True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example

Jang

Park

Lee³

et al. 2012

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference

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This paper presents a true event-driven simulation methodology for analog/mixed signal systems. To avoid generation of new output events without an input event, analog waveforms are expressed as a set of parameter values for an analytical basis function, c⋅t m-1 eat ⋅u(t). Also, the s-domain analysis enables an algebraic computation of the output event without involving timestep integration. The proposed methodology implemented in SystemVerilog is demonstrated with a decision-feedback equalizer (DFE) example. The experimental results show that both the speed and accuracy of the simulation depend very weakly on the time step resolution, supporting that a true event-driven simulation is realized.

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Section: Implementation In Systemverilogmentioning

confidence: 97%

“…The proposed methodology is an extension of our previous work [5] which demonstrated the primitive concept but used multiple different analytical basis functions for different types of analog signals (e.g. PWL, exponentials, PLL loop filter output).…”

Section: Introductionmentioning

confidence: 98%

True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example

Jang

Park

Lee³

et al. 2012

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference

Self Cite

View full text Add to dashboard Cite

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“…[7] asserted that the standard deviation of the input-referred quantization noise is approximately equal to three-fourths of the standard deviation of input jitter and the linearized gain of the BBPD takes an expression of (19) when the transition density is 1.0. It follows that the outputreferred quantization error for can be expressed as…”

Section: B Linearized Gain Of a Bang-bang Phase Detector For Jitter mentioning

confidence: 99%

Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits

Park

Kim

2013

IEEE Trans. Circuits Syst. I

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This paper describes an accurate, yet analytical method to predict the key characteristics of a bang-bang controlled timing loop: namely, the jitter transfer (JTRAN), jitter generation (JG), and jitter tolerance (JTOL). The analysis basically derives a linearized model of the system, where the bang-bang phase detector is modeled as a set of two linearized gain elements and an additive white noise source. This phase detector (PD) model is by far the most extensive one in literature, which can correctly estimate the effects of random jitter, transition density, and finite loop latency on the loop characteristics. The described pseudo-linear analysis assumes the presence of random jitter at the PD input and the minimum jitter necessary to keep the linear model valid is derived, based on a describing function analysis and Nyquist stability analysis. The presented analysis re-confirms the findings of prior theories and provides theoretical basis to the prior empirically-drawn equations, such as those for the quantization noise power and the gain reduction in presence of a finite loop delay. The predictions based on the presented analysis match well with the results from time-accurate behavioral simulations.

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“…In [8], FIR filters and adjustable circuit parameters such as multiple biases were implemented. In [5], the constant time-step approach is supplemented with additional data such as the actual crossing time of a clock transition. There is also a large body of related research in macromodeling ( [1], [4], [7]), which attempts to create extremely accurate models to replace SPICE simulation entirely.…”

Section: Introductionmentioning

confidence: 99%

A Verilog piecewise-linear analog behavior model for mixed-signal validation

Liao

Horowitz

2013

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference

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Full chip mixed-signal validation requires simulating the entire design through a large number of test vectors, which makes fast, event-based Verilog models of analog circuits essential. We describe an extensible approach to creating these models that maps continuous signals into piecewise linear waveforms by creating analog events which contain a value and slope. By breaking analog circuits into sub-blocks with mostly unidirectional ports, we avoid explicit time integration, thus fitting well into an event-driven digital framework. The result is Verilog analog functional models that are pin-accurate, fast to simulate and capture the key dynamics in analog circuits. A 2.5V-1.8V buck converter and 1GHz PLL models are demonstrated. I. INTRODUCTIONMixed-signal systems in which digital and analog circuits communicate across a tight interface are commonplace today. This tight coupling compounded with the large complexity of the system, and the large number of test vectors that need to be run at the system level requires efficient system-level simulation models. The only practical means of performing this validation is through efficient HDL simulator [8]. Thus it is essential to have analog functional models that would fit seamlessly into the digital validation framework.Given the importance of full system simulation, there has been considerable work in this area. Verilog-AMS based method is one example [2]. These behavioral models use differential equations and time integration, and hence require solvers similar to those found in circuit simulators. Matlab/Simulink [6] is another common route. While these models are faster than the Verilog-AMS models, they are run in Matlab's event-driven simulator and have little resemblance to the physical circuit thereby limiting their value in validation effort. Analog behavioral modeling has also been attempted in digital Verilog and these models are typically constant timestep based. In [8], FIR filters and adjustable circuit parameters such as multiple biases were implemented. In [5], the constant time-step approach is supplemented with additional data such as the actual crossing time of a clock transition. There is also a large body of related research in macromodeling ([1],[4],[7]), which attempts to create extremely accurate models to replace SPICE simulation entirely.

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Fast and accurate event-driven simulation of mixed-signal systems with data supplementation

Cited by 15 publications

References 4 publications

True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example

True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example

Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits

A Verilog piecewise-linear analog behavior model for mixed-signal validation

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