Failure mechanisms in HfO2 high-k gate stack MOSFETs

Abstract

CHAPTER 2 LITERATURE REVIEW……………………………………………...9 2.1 Introduction………………………………………………………………………..9 2.2 Silicon dioxide gate insulator……………………………………………………...9 2.2.1 Physical and statistical models for gate oxide breakdown……………..10 2.2.2 Electrical characterization of device breakdown and circuit failure…...16 2.2.3 Physical analysis of breakdown phenomenon in ultrathin gate oxide….21 2.3 HfO 2 high-κ gate dielectric……………………………………………………….29 ATTENTION: The Singapore Copyright Act applies to the use of this document. Nanyang Technological University Library IV 2.4 Metal gate electrode……………………………………………………………...37 2.5 Summary…………………………………………………………………………41 CHAPTER 3 EXPERIMENTS……………………………………………………...42 3.1 Introduction………………………………………………………………………42 3.2 Devices used in study…………………………………………………………….42 3.3 Electrical characterization of unstressed devices………………………………...44 3.4 Constant voltage stress (CVS)……………………………………………………50 3.4.1 Determination of average breakdown voltage………………………….51 3.4.2 Determination of V gstress ………………………………………………..52 3.5 Successive constant voltage stress (SCVS)………………………………………53 3.6 Two-step stress…………………………………………………………………...53 3.7 Multiple-stage stress……………………………………………………………...54 3.8 Electrical characterization………………………………………………………..55 3.9 Physical analysis…………………………………………………………………55 3.9.1 TEM/EDS/EELS sample preparation by focus ion beam……………...57 3.9.2 TEM/EDS/EELS/Elemental dot mapping analysis…………………….60 3.10 Simulation………………………………………………………………………61 3.11 Summary ………………………………………………………………………..62 CHAPTER 4 FAILURE MECHANISMS/DEFECTS IN HfO 2 HIGH-κ κ κ κ/POLY-SI GATE STACK MOSFETS………………………………………………………….63 4.1 Introduction………………………………………………………………………63 4.2 Comparision of common failure mechanisms/defects between HfO 2 /poly-Si gate stacks and SiO x N y /poly-Si and Si 3 N 4 /poly-Si gate stacks……………………… 64 4.2.1 Polarity-dependent dielectric-breakdown-induced epitaxy…………….64 4.2.2 Dielectric-breakdown-induced migration………………………………75 4.3 New failure mechanisms/defects in HfO 2 /poly-Si gate stacks …………………..79 4.3.1 Grain boundary and field assisted multiple breakdowns…………….....79 4.3.2 HfO 2 high-κ/spacer-interface breakdown…………………………….88 4.3.3 "Ball-shaped" capping layer…………………………………………....98 4.3.4 Self healing insulating cap model…………………………………….103

Reliability of emerging nanodevices

“…The carriers can also get trapped in these defect sites resulting in random telegraph noise (RTN) fluctuations of the gate and drain current [28] as evident in Figure 8.6(b) [27]. Figure 8.6(d) shows typical trends of measured gate leakage resulting in the TDDB event [26]. This is called the "percolation path" [29] (Figure 8.6(c)), and once this percolation event occurs, a sudden jump in the leakage current is observed and this whole process is called time-dependent dielectric breakdown (TDDB) [30].…”

“…The defects that are generated randomly (according to the Poisson distribution) across the stressed dielectric continue to be generated until a point is reached when a connecting path of defects linking the gate and substrate is formed. (d) Typical current-time stress patterns during TDDB stress [26]. Figure 8.6(d) shows typical trends of measured gate leakage resulting in the TDDB event [26].…”

Statistical characterization and reliability modeling of novel high-K gate dielectric stacks

“…16 -HRTEM image of the poly-Si HfO 2 -SiO x gate stack showing the HK thickness, t HK = 44Å and IL layer thickness, t IL = 8-12Å[207].…”