Fabrication of submicron Nb/AlO/sub x/-Al/Nb tunnel junctions using focused ion beam implanted Nb patterning (FINP) technique

Abstract

We have successfully fabricated 0.2 pm2 Nb/AlOx/Nb tunnel junctions using the focusedion-beam implanted Nb patterning (FINP) technique for junction definition.The success was due to improvement of the edge profile of the counter electrode.The vertical edge profile was realized with the large etching selectivity of Ga implanted Nb over unimplanted Nb by controlling the reactive neutrals in the plasma. The critical current IC a n d the quality parameter V, of 0.2 pm2 junctions were 10.5 pA and 11 mV, respectively. The R,,IR, w a s 12. The maximum to minimum spread in IC of 60 series junctions with areas of 0.5 Fm2 was * 10 %.

Progress in Nb-based low-temperature superconductive electronics for high-speed digital applications in Japan

“…The development of niobium junctions (Nb/AlOx/Nb) and their fabrication process resolved most of the problems 0953-2048/97/010001+05$19.50 c 1997 IOP Publishing Ltd in process reliability and yield for Josephson LSIs [18]. Many efforts to further improve process technology for Josephson integrated circuits have been made in the last five years [19][20][21][22][23][24][25][26]. The objectives of these works are realization of sub-micrometre Josephson junctions and junctions with high current density, which are required for high-density integration and high-speed switching.…”

Micron and submicron Nb/Al-AlO/sub x//Nb tunnel junctions with high critical current densities

“…Reducing junction size can also increase the integrated circuit density. When the junction size approaches submicron Manuscript [3].…”

Multilayer technique for fabricating Nb junction circuits exhibiting charging effects

“…The process also uses in situ growth of the Nb/AlO x /Nb sandwich and planarization of the interlayer insulation. There are three main features as against the preceding works 8,9 :…”

“…Then, the junction patterns should be defined by reactive ion etching (RIE) through an SiO 2 mask 8 or Nb regions implanted by Ga, that plays the role of an etching mask 9 . In both cases vias in the insulation between base electrode and wiring above junction pillars are opened by the planarization technique: either by chemical mechanical polishing (CMP) 8 or by a resist partial etching back 9 . In this paper we present the novel process developed by us for fabricating the circuits with small Nb junctions.…”

“…A number of attempts were made to fabricate submicron-scale Nb/AlO x /Nb tunnel junctions. These approaches can be divided into two groups: first, the techniques in which the tunnel barrier was formed ex situ 5,6 , and, secondly, those in which it was grown in situ [7][8][9] …”