Fabrication of free standing structure using single step electrochemical etching in hydrofluoric acid

Ohji, Hiroshi; Trimp, P.J.; French, P.J.

doi:10.1016/s0924-4247(98)00260-x

Cited by 39 publications

(19 citation statements)

References 15 publications

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“…The unique aspect of this research is the demonstrated process control that we can exercise on the etching process, to control the shape and morphology of mesopores of Si. While porous silicon etching has been an active area of contemporary research, most of the research efforts are focused on development of sensor applications [9,10] or understanding the mechanisms of the process [5,[11][12][13]. The etched structures of this process are pores of Si of various diameters and shapes which can be modified by controlling various etch parameters and variables such as the applied voltage, current density, etchant concentration, etch time, wafer type etc.…”

Section: Deep Wet Etching (Dwe)mentioning

confidence: 99%

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Porous Silicon Fabrication for MEMS Applications

Yue¹,

Zhen²

2019

SJET

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We describe the use of porous silicon fabrication technique for fabricating non-manhattan structures in silicon using wet etching. The fabrication method is simple to set up, economical and produces smooth etched surface. A solid source diffusion of N++ in a P type wafer with low stress thermally grown silicon nitride is used as a masking layer. Comparison of porous silicon etches with wafers solid source diffusion and implanted diffusion is presented. The result show that areas where a solid source diffusion is used form an etch angle of 70-80°, however using an implanted diffusion the etch angle is closer to 90°. The selectivity of the etch during porous silicon fabrication using any of the above two as masking layer results in fabrication of high aspect ratio non-manhattan structures. These structures since are wet etched do not have surface roughness and can be used for optical applications.

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Section: Deep Wet Etching (Dwe)mentioning

confidence: 99%

“…Consequently the cost per wafer increases. The cost of a typical DRIE system with the ability to handle 4 inch wafers is expensive [7][8][9]. While the cost of processing the wafer using DRIE is based on features being etched and time, the typical cost of etching is economical.…”

Section: Introductionmentioning

confidence: 99%

Porous Silicon Fabrication for MEMS Applications

Yue¹,

Zhen²

2019

SJET

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“…The idea was first proposed by (Lehmann 1996) and has been used to make large capacitors (Roozeboom, 2001) and micromachined structure (Ohji 1999). Both of these structures are illustrated in Figure 5.…”

Section: Bulk Micromachiningmentioning

confidence: 99%

Integrated MEMS: Opportunities & Challenges

French¹,

Sarro²

2012

Micromachining Techniques for Fabrication of Micro and Nano Structures

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“…Free-standing 3D structures such as geometric pits, digitated trenches, walls, and cantilever beams can be galvanostatically formed using backside illumination during etching. [25] Polycrystalline silicon (ªpolysiliconº) strain-free membranes [26] (Fig. 5) can be created by thin-film deposition over porous silicon layers, followed by selective dissolution of the porous silicon.…”

Section: Porous Silicon Technology In Si Lithographymentioning

confidence: 99%