Fabrication of a 3D nano-imprint template with a conformal dry vapor deposited electron beam resist

Beauvais, J.; Lavallée, Éric; Zanzal, Andrew; Drouin, Dominique; Lau, Kien Mun; Veres, Teodor; Cui, Bo

doi:10.1117/12.599795

Cited by 1 publication

(2 citation statements)

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“…The current process is also not capable of fabricating a two-level structure where the features of the “top” level sit inside the trenches (rather than on top of the ridges) of the “bottom” level. Such a structure can only be fabricated using the conventional method involving two separate EBL steps, as demonstrated in Ref [4]. …”

Section: Discussionmentioning

confidence: 99%

“…In addition to improved alignment accuracy, the process consists of fewer steps than previous mold fabrication process that involves two EBL steps and two pattern transfer steps by etching. Moreover, in the previous process, the resist for the second pattern level is spun on a non-flat surface consisting of features of the first pattern level, which leads to resist film thickness non-uniformity and process error unless a dry evaporated resist is used [3,4]. This problem is not an issue for the current process since the bi-layer resists are spun on a flat wafer surface one after the other.…”

Section: Introductionmentioning

confidence: 99%

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Mold Fabrication for 3D Dual Damascene Imprinting

Rahman

Cui

2010

Nanoscale Res Lett

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Previously, a damascene process based on nanoimprint lithography has been proposed (Schmid G M, et al. in J Vac Sci Technol B 24(3) 1283, 2006) to greatly reduce the fabrication steps of metal interconnection in integrated circuit. For such a process to become a viable technique, a mold having two pattern levels with precise alignment between them must be fabricated first. To this end, this work demonstrates a “self-aligned” fabrication process where the two pattern levels would be perfectly aligned if ignoring the noise during e-beam writing. The process is based on one EBL on a bi-layer resist stack, with the sensitivity for the top layer much higher than that of the bottom layer, which enables separate pattern transfer of the two pattern levels. Using ZEP-520A and poly(dimethylglutarimide) (PMGI) resists, we fabricated pillars having a diameter of 150 nm sitting on ridges having a width of 1.5 μm, which can be used to create via-holes and trenches for IC interconnect by nanoimprint lithography. The current process can also find applications in other areas that require two-level patterning with precise alignment between them.

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Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%