2022
DOI: 10.1016/j.mejo.2021.105332
|View full text |Cite
|
Sign up to set email alerts
|

Fabrication and high-frequency characterization of low-cost fan-in/out WLP technology with RDL for 2.5D/3D heterogeneous integration

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
4
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
5
2

Relationship

0
7

Authors

Journals

citations
Cited by 9 publications
(4 citation statements)
references
References 19 publications
0
4
0
Order By: Relevance
“…According to the structures designed above, a 12-inch waferlevel TMV additive manufacturing fabrication process was used to fabricate Samples 1-3. As shown in Figure 3, the whole process contained eight steps, in which Steps (a)-(c) were RDL fabrication method (Onozeki et al, 2018;Xu et al, 2022a): 1 A 12-inch silicon wafer with the thickness of 775 mm was applied as the substrate. Resin films were laminated on the both sides and heated at 200°C for 1 h. 2 After Ti/Cu seed layer sputtering and 10 mm-thick photoresist (PR) spin-coating, PR was photoetched to form the bottom CPW pattern.…”
Section: Fabrication Processmentioning
confidence: 99%
See 1 more Smart Citation
“…According to the structures designed above, a 12-inch waferlevel TMV additive manufacturing fabrication process was used to fabricate Samples 1-3. As shown in Figure 3, the whole process contained eight steps, in which Steps (a)-(c) were RDL fabrication method (Onozeki et al, 2018;Xu et al, 2022a): 1 A 12-inch silicon wafer with the thickness of 775 mm was applied as the substrate. Resin films were laminated on the both sides and heated at 200°C for 1 h. 2 After Ti/Cu seed layer sputtering and 10 mm-thick photoresist (PR) spin-coating, PR was photoetched to form the bottom CPW pattern.…”
Section: Fabrication Processmentioning
confidence: 99%
“…According to the structures designed above, a 12-inch wafer-level TMV additive manufacturing fabrication process was used to fabricate Samples 1–3. As shown in Figure 3, the whole process contained eight steps, in which Steps (a)–(c) were RDL fabrication method (Onozeki et al , 2018; Xu et al , 2022a):…”
Section: Fabrication Processmentioning
confidence: 99%
“…This article proposes a novel SIW-based bandpass filter with periodic arrays of meander-slot etching on the top metallic layer. In [30], an advanced RDL (redistribution layer) process was adopted to design passive components, and it proved to be feasible. In this article, we design the filter using a silicon substrate with 4 RDLs.…”
Section: Introductionmentioning
confidence: 99%
“…Due to a low dielectric loss, a glass interposer was used for high-performance highfrequency applications. The accurate characterization of through-glass via (TGV) interconnects is critical for their applications [8,9]. However, non-coplanar ends would pose challenges to the testing process.…”
mentioning
confidence: 99%