EXTENT: Enabling Approximation-Oriented Energy Efficient STT-RAM Write Circuit

Seyedfaraji, Saeed; Talafy, Javad; Aly, Mohamed M. Sabry; Rehman, Semeen

doi:10.1109/access.2022.3194679

Cited by 3 publications

(2 citation statements)

References 68 publications

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“…One of the techniques involves using a smaller ∆ value, which can accelerate the switching of the MTJ cell due to the reduction in I c value. Consequently, the required switch time of the MTJ reduces for the same target Write Error Rate (WER) [48], [49].…”

Section: D: Write Errormentioning

confidence: 99%

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Yusuf,

Adegbija,

Gajaria

2024

IEEE Access

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In recent years, the rapid growth of big data and the increasing demand for high-performance computing have fueled the development of novel computing architectures. Among these, in-memory computing architectures that leverage the high-density and low-latency nature of modern memory technologies have emerged as promising solutions for domain-specific computing applications. STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) is one such in-memory computing technology that holds great potential for this field due to its non-volatility, high endurance, and low power consumption. In this survey paper, we aim to provide a comprehensive overview of the state-of-the-art in STT-MRAM-based domainspecific in-memory computing (DS-IMC) architectures. We examine the challenges, opportunities, and trade-offs associated with these architectures from the perspective of various application domains, like machine learning, image and signal processing, and data encryption. We explore different experimental research tools used in studying these architectures, guidelines for efficiently designing them, and gaps in the state-of-the-art that necessitate future research and development.INDEX TERMS domain-specific architectures, in-memory computing, spin-transfer torque RAM.

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Section: D: Write Errormentioning

confidence: 99%

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Yusuf,

Adegbija,

Gajaria

2024

IEEE Access

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“…Therefore, NVM became an attractive alternative for main memories because of lower energy consumption. Phase Change Memory (PCM), and STT-RAM [19] are some of the common NVMs proposed to replace DRAM as main memory. They have also been explored for building larger on-chip caches because of their high density.…”

Section: Introductionmentioning

confidence: 99%

HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis

Seyedfaraji,

Bichl,

Aftab

et al. 2024

IEEE Access

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Spin Transfer Torque Random Access Memory (STT-RAM) is an emerging Non-Volatile Memory (NVM) technology that has garnered attention to overcome the drawbacks of conventional CMOS-based technologies. However, such technologies must be evaluated before deployment under real workloads and architecture. But there is a lack of available open-source STT-RAM-based system evaluation framework, which hampers research and experimentation and impacts the adoption of STT-RAM in a system. This paper proposes a novel, extendable STT-RAM memory controller design integrated inside the gem5 simulator. Our framework enables understanding various aspects of STT-RAM, i.e., power, delay, clock cycles, energy, and system throughput. We will open-source our HOPE framework, which will fuel research and aid in accelerating the development of future system architectures based on STT-RAM. It will also facilitate the user for further tool enhancement.

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