Exploiting Gate Leakage in Deep-Submicrometer CMOS for Input Offset Adaptation

Abstract

Gate leakage that occurs in deep-submicrometer CMOS might be a convenient new way of implementing highly resistive elements with minimal area consumption. We present an adaptive device that exploits gate leakage in the 90-nm STM CMOS process for offset cancellation at its input. This is achieved by a high-pass-filtering input stage with a very low cutoff due to a time constant of approximately 130 ms. In this filter, three 0.1 0.22 m 2 gate-oxide structures are used to achieve the equivalent of a 6.5-G resistance.

A Gate Leakage Feedback Element in an Adaptive Amplifier Application

“…3. Although we found in [3] that the BSIM4 model assumes too symmetrical GL characteristics of the two devices we can still see that the individual currents of nMOS and pMOS are somewhat asymmetric around the zero bias voltage point. The two main disadvantages with a GL element versus a resistive element can already here be seen; For a high-pass filter application the quick and almost exponential increase in current causes a damping of low-frequency signals that is a function of the signal amplitude.…”

“…Like with the implementation of [7]- [10] or other variants [3] it is fairly easy to use the element we present here as a QIR device [2] to set the dc operating point of a transistor and thus implement circuits with many of the desired properties of floating-gate circuits, such as continuous-time mixing (addition/ subtraction) and tunability, but without the need of programming which requires the use of either UV-light, Fowler-Nordheim Tunneling, or hot-carrier injection [11].…”

“…Measurements of the leakage through the GL element were conducted on ten samples from the same wafer with a technique similar to that of [3]. For all measurements the programmed offset and the amplifier bias were set at 500 mV, yielding a bias current of approximately 1.06 A.…”

“…It is however possible to take advantage of the small leakage currents and use them as what has been termed quasi-infinite resistors (QIRs) elements [2]. In a previous brief [3] we experimented on using the GL current to set a dc gate bias voltage of a thick-oxide transistor.…”

“…Some electrons will thus travel so far so that they bypass the energy barrier and is captured on the other side. In our previous publication [3] we calculated gate currents both by a model for direct tunneling taken from [4] with parameters taken from [5], [6] and from the BSIMV4 model with parameters supplied by the process design kit. In this brief we have relied on BSIMV4 simulations alone and supplied it with measurements.…”