Experimental results and their simplified analysis on instability problems in PWM inverter induction motor drives

Ueda, Ryuzo; Sonoda, T.; Takata, S.

doi:10.1109/28.18873

Cited by 48 publications

(18 citation statements)

References 6 publications

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“…A number of open-loop V/f induction motor drives have been reported to exhibit oscillatory behaviour at low and medium speeds, and particularly under light-load conditions [1][2][3][4][5][6][7][8][9][10]. This light-load instability phenomenon is impacted by motor parameters such as stator and rotor resistances, leakage and magnetising reactances and inertia [1,3,10].…”

Section: Introductionmentioning

confidence: 99%

Theoretical prediction and experimental verification of light-load instability in a 11-kW open-loop induction motor drive

Guha

Chetty²,

Kumaresan³

et al. 2017

Sādhanā

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This paper presents the small-signal stability analysis of an 11-kW open-loop inverter-fed induction motor drive, including the effect of inverter dead-time. The analysis is carried out using an improved smallsignal model of the drive that has been reported in literature recently, and is used to demonstrate small-signal instability in a higher-power-level motor. Through small-signal stability analysis, the region of oscillatory behaviour is identified on the voltage versus frequency plane (V-f plane), considering no-load. These predictions using the improved model are also compared against predictions of a standard model of an inverter-fed induction motor including dead-time effect. The oscillatory behaviour of the 11-kW motor drive is also studied through extensive time-domain numerical simulations and actual measurements over wide ranges of operating conditions. Both the simulation and experimental results confirm the validity of the predictions by the improved analytical model. Further, these results establish that the analysis is valid for both sine-triangle pulse-width modulation (PWM) and conventional space vector PWM.

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Section: Introductionmentioning

confidence: 99%

Theoretical prediction and experimental verification of light-load instability in a 11-kW open-loop induction motor drive

Guha

Chetty²,

Kumaresan³

et al. 2017

Sādhanā

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“…However undesirable sustained oscillations of rotor speed in IM drive system are often found in steady state with low frequency and light load [1][2][3]. There are few studies based on numerical analysis and experimental validation with relation to the problem [4][5][6][7]. The physical mechanism and control of sustained oscillation are still under research [8][9].…”

Section: Introductionmentioning

confidence: 99%

“…Then equations (1), (2), and (3) At first, let py1, PY2, py3 I py4 and py5 be zero in equation (4). Through some algebraic manipulations on (4), a third-order nonlinear algebraic equation with respect to y5 is obtained.…”

Section: Introductionmentioning

confidence: 99%

Sustained oscillation of an inverter-fed induction motor drive system and its stabilization

Hikihara²

2005

2005 International Conference on Electrical Machines and Systems

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Sustained oscillation of rotor speed is often experienced in PWM inverter induction motor (IM) drive systems. In this paper the sustained oscillation phenomena is investigated from the point of view of Hopf bifurcation theory. The sufficient and necessary conditions for existence of limit cycle are presented to determine bifurcation set in plane of stator voltage versus stator frequency. This research indicates that bifurcation set exists in the condition of IM inherent instability. At last, it is shown that V/f curve can be set to stabilize the sustained oscillation of rotor speed and results are numerically verified.

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“…To avoid shorting the DC voltage bus, the gate pulses of the upper and lower transistors on the same switch pole need to be separated by the dead-time. The dead-time causes output voltage error and results in decreased fundamental voltage, current distortion, and motor torque ripples (1) (2) . The dead-time also affects the current tracking performance even if the inverter operates under the current control mode (3) .…”

Section: Introductionmentioning

confidence: 99%

An Integrated Pulse Width Modulator/Dead-time Generator with Improved Output Voltage Precision

2006

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This paper presents an integrated pulse width modulator with dead-time generation capability. The proposed modulator can place proper dead-time around gating pulses while maintaining the correct volt-second of the output voltage on a pulse-by-pulse basis. The proposed method is suitable for digital implementation of the pulsewidth modulator (PWM). Compared to the conventional dead-time compensation by average voltage correction, the proposed method provides improved accuracy of output voltages and hence better dynamic response. Experimental results on a variable speed drive platform and a shunt active filter platform are provided to verify the proposed method. Comparisons with the conventional dead-time generation and compensation method on the same platforms are also presented. Fig. 1 shows a typical inverter switch pole with transistors T A1 , T A2 , and free wheeling diodes D 1 , D 2 . Dead-time is introduced between the gate signals of T A1 , and T A2 to avoid shorting the DC bus.During the dead-time the output voltage is determined by the polarity of the current, rather than the PWM gate signal. In order to maintain the correct timing and volt.-sec. of the output voltage pulse, the proposed scheme uses main PWM carrier T ri, and the auxiliary carriers T ri + and T ri − as illustrated in Fig. 2. For positive output current, ie. i > 0, the free-wheeling diode D 2 conducts during the dead-time, thus forcing the actual output voltage V AN to follow the ideal upper switch gate pulse V g10 . V g10 . So the actual gate pulse V g1 is generated by comparing V re f and T ri , and is maintained identical to V g10 . To place proper dead-time, V g2 is generated by comparing V re f and T ri− , so the dead-time T d is created between the actual gate pulses V g1 and V g2 as illustrated in Fig. 2. For negative output current, ie. i < 0, V re f is compared to T ri and T ri + to produce the gate pulses.The proposed integrated pulse-width modulator provides a solution to integrate the dead-time generator and the pulse-width modulator altogether. The proposed method is very convenient for digital implementation, as it is implemented on a CPLD in this paper. The proposed method produces output voltage pulses which are identical to the ideal gate pulses without any time delay. The dead-time placement also ensures the correctness of volt.-sec. on a per pulse basis. The proposed method is verified by a conventional V/ f inverter drive, and the motor current distortion is clearly improved.The shunt active filter test shows even more improvement in the precision of the current-controlled inverter. Non-memberHung-Chih Lin * Non-memberChung-Chuan Hou * Non-memberThis paper presents an integrated pulse width modulator with dead-time generation capability. The proposed modulator can place proper dead-time around gating pulses while maintaining the correct volt-second of the output voltage on a pulse-by-pulse basis. The proposed method is suitable for digital implementation of PWM, and the required computational resource is very low. Com...

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Experimental results and their simplified analysis on instability problems in PWM inverter induction motor drives

Cited by 48 publications

References 6 publications

Theoretical prediction and experimental verification of light-load instability in a 11-kW open-loop induction motor drive

Theoretical prediction and experimental verification of light-load instability in a 11-kW open-loop induction motor drive

Sustained oscillation of an inverter-fed induction motor drive system and its stabilization

An Integrated Pulse Width Modulator/Dead-time Generator with Improved Output Voltage Precision

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